diff mbox series

[v7,8/8] PCI: imx6: Add the compliance tests mode support

Message ID 1644992463-14467-9-git-send-email-hongxing.zhu@nxp.com
State New
Headers show
Series PCI: imx6: refine codes and add compliance tests mode support | expand

Commit Message

Hongxing Zhu Feb. 16, 2022, 6:21 a.m. UTC
Refer to the system board signal Quality of PCIe archiecture PHY test
specification. Signal quality tests(for example: jitters,  differential
eye opening and so on ) can be executed with devices in the
polling.compliance state.

To let the device support polling.compliance stat, the clocks and powers
shouldn't be turned off when the probe of device driver is failed.

Based on CLB(Compliance Load Board) Test Fixture and so on test
equipments, the PHY link would be down during the compliance tests.
Refer to this scenario, add the i.MX PCIe compliance tests mode enable
support, and keep the clocks and powers on, and finish the driver probe
without error return.

Use the "pci_imx6.compliance=1" in kernel command line to enable the
compliance tests mode.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 47 ++++++++++++++++++---------
 1 file changed, 31 insertions(+), 16 deletions(-)

Comments

Bjorn Helgaas Feb. 23, 2022, 5:40 p.m. UTC | #1
In subject:

s/Add the/Add/

On Wed, Feb 16, 2022 at 02:21:03PM +0800, Richard Zhu wrote:
> Refer to the system board signal Quality of PCIe archiecture PHY test
> specification. Signal quality tests(for example: jitters,  differential
> eye opening and so on ) can be executed with devices in the
> polling.compliance state.

s/archiecture/architecture/
s/tests(for/tests (for/
s/jitters,  /jitter, /              (remove double space)
s/so on )/so on)/

Is this a reference to a spec?  If so, I can't tell the name of the
spec, the revision, or the section number.

> To let the device support polling.compliance stat, the clocks and powers
> shouldn't be turned off when the probe of device driver is failed.

s/stat/state/
s/powers/power/
s/driver is failed/driver fails/

> Based on CLB(Compliance Load Board) Test Fixture and so on test
> equipments, the PHY link would be down during the compliance tests.
> Refer to this scenario, add the i.MX PCIe compliance tests mode enable
> support, and keep the clocks and powers on, and finish the driver probe
> without error return.

s/CLB(Compliance/CLB (Compliance/

> Use the "pci_imx6.compliance=1" in kernel command line to enable the
> compliance tests mode.

Thanks for including this in the commit log!

>  	ret = dw_pcie_host_init(&pci->pp);
> -	if (ret < 0)
> +	if (ret < 0) {
> +		if (imx6_pcie_cmp_mode) {
> +			dev_info(dev, "Driver loaded with compliance test mode enabled.\n");

To match other messages:

s/Driver loaded/driver loaded/
s/enabled./enabled/

> +			ret = 0;
> +		} else {
> +			dev_err(dev, "Unable to add pcie port.\n");

s/Unable/unable/
s/pcie/PCIe/
s/port./port/

> +		}
>  		return ret;
> +	}
>  
>  	if (pci_msi_enabled()) {
>  		u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
> -- 
> 2.25.1
>
Hongxing Zhu Feb. 24, 2022, 7:50 a.m. UTC | #2
> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: 2022年2月24日 1:40
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com; broonie@kernel.org;
> lorenzo.pieralisi@arm.com; jingoohan1@gmail.com; festevam@gmail.com;
> francesco.dolcini@toradex.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v7 8/8] PCI: imx6: Add the compliance tests mode support
> 
> In subject:
> 
> s/Add the/Add/
> 
> On Wed, Feb 16, 2022 at 02:21:03PM +0800, Richard Zhu wrote:
> > Refer to the system board signal Quality of PCIe archiecture PHY test
> > specification. Signal quality tests(for example: jitters,
> > differential eye opening and so on ) can be executed with devices in
> > the polling.compliance state.
> 
> s/archiecture/architecture/
> s/tests(for/tests (for/
> s/jitters,  /jitter, /              (remove double space)
> s/so on )/so on)/
Got that. Thanks for your kindly review comments.

> 
> Is this a reference to a spec?  If so, I can't tell the name of the spec, the
> revision, or the section number.
Yes, it is a reference to a spec. How about change them to the following?

PCI: imx6: Add compliance tests mode support

Refer to the Chapter 3.2 System Board Signal Quality of PCI Express
Architecture PHY Test Specification Revision 2.0.

Signal quality tests (for example: jitter, differential eye opening and
so on) can be executed with devices in the polling.compliance state.

To let the device support polling.compliance state, the clocks and powers
shouldn't be turned off when the probe of device driver fails.

Based on CLB (Compliance Load Board) Test Fixture and so on test
equipments, the PHY link would be down during the compliance tests.
Refer to this scenario, add the i.MX PCIe compliance tests mode enable
support, and keep the clocks and powers on, and finish the driver probe
without error return.

Use the "pci_imx6.compliance=1" in kernel command line to enable the
compliance tests mode.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> 
> > To let the device support polling.compliance stat, the clocks and
> > powers shouldn't be turned off when the probe of device driver is failed.
> 
> s/stat/state/
> s/powers/power/
> s/driver is failed/driver fails/
Okay.

> 
> > Based on CLB(Compliance Load Board) Test Fixture and so on test
> > equipments, the PHY link would be down during the compliance tests.
> > Refer to this scenario, add the i.MX PCIe compliance tests mode enable
> > support, and keep the clocks and powers on, and finish the driver
> > probe without error return.
> 
> s/CLB(Compliance/CLB (Compliance/
Okay. Would be updated later.

> 
> > Use the "pci_imx6.compliance=1" in kernel command line to enable the
> > compliance tests mode.
> 
> Thanks for including this in the commit log!
> 
> >  	ret = dw_pcie_host_init(&pci->pp);
> > -	if (ret < 0)
> > +	if (ret < 0) {
> > +		if (imx6_pcie_cmp_mode) {
> > +			dev_info(dev, "Driver loaded with compliance test mode
> > +enabled.\n");
> 
> To match other messages:
> 
> s/Driver loaded/driver loaded/
> s/enabled./enabled/
Okay.

> 
> > +			ret = 0;
> > +		} else {
> > +			dev_err(dev, "Unable to add pcie port.\n");
> 
> s/Unable/unable/
> s/pcie/PCIe/
> s/port./port/
Okay, would be updated later.
Thanks.

Best Regards
Richard Zhu

> 
> > +		}
> >  		return ret;
> > +	}
> >
> >  	if (pci_msi_enabled()) {
> >  		u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
> > --
> > 2.25.1
> >
Bjorn Helgaas Feb. 24, 2022, 11:54 p.m. UTC | #3
On Thu, Feb 24, 2022 at 07:50:09AM +0000, Hongxing Zhu wrote:
> > -----Original Message-----
> > From: Bjorn Helgaas <helgaas@kernel.org>
> > Sent: 2022年2月24日 1:40
> > To: Hongxing Zhu <hongxing.zhu@nxp.com>
> > Cc: l.stach@pengutronix.de; bhelgaas@google.com; broonie@kernel.org;
> > lorenzo.pieralisi@arm.com; jingoohan1@gmail.com; festevam@gmail.com;
> > francesco.dolcini@toradex.com; linux-pci@vger.kernel.org;
> > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> > kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> > Subject: Re: [PATCH v7 8/8] PCI: imx6: Add the compliance tests mode support

> > Is this a reference to a spec?  If so, I can't tell the name of the spec, the
> > revision, or the section number.
> Yes, it is a reference to a spec. How about change them to the following?
> 
> PCI: imx6: Add compliance tests mode support
> 
> Refer to the Chapter 3.2 System Board Signal Quality of PCI Express
> Architecture PHY Test Specification Revision 2.0.
> 
> Signal quality tests (for example: jitter, differential eye opening and
> so on) can be executed with devices in the polling.compliance state.
> 
> To let the device support polling.compliance state, the clocks and powers
> shouldn't be turned off when the probe of device driver fails.
> 
> Based on CLB (Compliance Load Board) Test Fixture and so on test
> equipments, the PHY link would be down during the compliance tests.
> Refer to this scenario, add the i.MX PCIe compliance tests mode enable
> support, and keep the clocks and powers on, and finish the driver probe
> without error return.
> 
> Use the "pci_imx6.compliance=1" in kernel command line to enable the
> compliance tests mode.

Sounds good, thanks.
diff mbox series

Patch

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index fe671e88ec93..d7f0db01f3c3 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -146,6 +146,10 @@  struct imx6_pcie {
 #define PHY_RX_OVRD_IN_LO_RX_DATA_EN		BIT(5)
 #define PHY_RX_OVRD_IN_LO_RX_PLL_EN		BIT(3)
 
+static bool imx6_pcie_cmp_mode;
+module_param_named(compliance, imx6_pcie_cmp_mode, bool, 0644);
+MODULE_PARM_DESC(compliance, "i.MX PCIe compliance test mode (1=compliance test mode enabled)");
+
 static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val)
 {
 	struct dw_pcie *pci = imx6_pcie->pci;
@@ -840,10 +844,12 @@  static int imx6_pcie_start_link(struct dw_pcie *pci)
 	 * started in Gen2 mode, there is a possibility the devices on the
 	 * bus will not be detected at all.  This happens with PCIe switches.
 	 */
-	tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
-	tmp &= ~PCI_EXP_LNKCAP_SLS;
-	tmp |= PCI_EXP_LNKCAP_SLS_2_5GB;
-	dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
+	if (!imx6_pcie_cmp_mode) {
+		tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
+		tmp &= ~PCI_EXP_LNKCAP_SLS;
+		tmp |= PCI_EXP_LNKCAP_SLS_2_5GB;
+		dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
+	}
 
 	/* Start LTSSM. */
 	imx6_pcie_ltssm_enable(dev);
@@ -930,18 +936,20 @@  static void imx6_pcie_host_exit(struct pcie_port *pp)
 	struct device *dev = pci->dev;
 	struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
 
-	imx6_pcie_reset_phy(imx6_pcie);
-	imx6_pcie_clk_disable(imx6_pcie);
-	switch (imx6_pcie->drvdata->variant) {
-	case IMX8MM:
-		if (phy_power_off(imx6_pcie->phy))
-			dev_err(dev, "unable to power off phy\n");
-		break;
-	default:
-		break;
+	if (!imx6_pcie_cmp_mode) {
+		imx6_pcie_reset_phy(imx6_pcie);
+		imx6_pcie_clk_disable(imx6_pcie);
+		switch (imx6_pcie->drvdata->variant) {
+		case IMX8MM:
+			if (phy_power_off(imx6_pcie->phy))
+				dev_err(dev, "unable to power off phy\n");
+			break;
+		default:
+			break;
+		}
+		if (imx6_pcie->vpcie)
+			regulator_disable(imx6_pcie->vpcie);
 	}
-	if (imx6_pcie->vpcie)
-		regulator_disable(imx6_pcie->vpcie);
 }
 
 static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
@@ -1259,8 +1267,15 @@  static int imx6_pcie_probe(struct platform_device *pdev)
 		return ret;
 
 	ret = dw_pcie_host_init(&pci->pp);
-	if (ret < 0)
+	if (ret < 0) {
+		if (imx6_pcie_cmp_mode) {
+			dev_info(dev, "Driver loaded with compliance test mode enabled.\n");
+			ret = 0;
+		} else {
+			dev_err(dev, "Unable to add pcie port.\n");
+		}
 		return ret;
+	}
 
 	if (pci_msi_enabled()) {
 		u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);