| Message ID | 163434053788.914258.18412599112859205220.stgit@dwillia2-desk3.amr.corp.intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | None | expand |
On Fri, 15 Oct 2021 16:30:42 -0700 Dan Williams <dan.j.williams@intel.com> wrote: > From: Ben Widawsky <ben.widawsky@intel.com> > > In preparation for moving parts of register mapping to cxl_core, split > cxl_pci_setup_regs() into a helper that finds register blocks, > (cxl_find_regblock()), and a generic wrapper that probes the precise > register sets within a block (cxl_setup_regs()). > > Move the actual mapping (cxl_map_regs()) of the only register-set that > cxl_pci cares about (memory device registers) up a level from the former > cxl_pci_setup_regs() into cxl_pci_probe(). > > With this change the unused component registers are no longer mapped, > but the helpers are primed to move into the core. > > [djbw: drop cxl_map_regs() for component registers] > > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> > [djbw: rebase on the cxl_register_map refactor] > Reviewed-by: Ira Weiny <ira.weiny@intel.com> > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Hi Ben / all, This is probably the best patch to comment on for this (note it is not a comment about this patch, but more the state we end up in after it). cxl_map_regs() is a generic function, but with the new split approach as a result of this patch, we now always know at the caller which of the types of map we are doing. I think it would be clearer to embrace that situation and drop cxl_map_regs() in favor of directly calling the relevant specific versions such as cxl_map_device_regs(). I can't immediately see how the generic cxl_map_regs() will be useful to us going forwards. Jonathan
On 21-11-10 17:14:37, Jonathan Cameron wrote: > On Fri, 15 Oct 2021 16:30:42 -0700 > Dan Williams <dan.j.williams@intel.com> wrote: > > > From: Ben Widawsky <ben.widawsky@intel.com> > > > > In preparation for moving parts of register mapping to cxl_core, split > > cxl_pci_setup_regs() into a helper that finds register blocks, > > (cxl_find_regblock()), and a generic wrapper that probes the precise > > register sets within a block (cxl_setup_regs()). > > > > Move the actual mapping (cxl_map_regs()) of the only register-set that > > cxl_pci cares about (memory device registers) up a level from the former > > cxl_pci_setup_regs() into cxl_pci_probe(). > > > > With this change the unused component registers are no longer mapped, > > but the helpers are primed to move into the core. > > > > [djbw: drop cxl_map_regs() for component registers] > > > > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> > > [djbw: rebase on the cxl_register_map refactor] > > Reviewed-by: Ira Weiny <ira.weiny@intel.com> > > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > > Hi Ben / all, > > This is probably the best patch to comment on for this > (note it is not a comment about this patch, but more the state we end up > in after it). > > cxl_map_regs() is a generic function, but with the new split approach > as a result of this patch, we now always know at the caller which of > the types of map we are doing. > > I think it would be clearer to embrace that situation and drop cxl_map_regs() > in favor of directly calling the relevant specific versions such as > cxl_map_device_regs(). I can't immediately see how the generic cxl_map_regs() > will be useful to us going forwards. > > Jonathan I completely agree. Long term, something like cxl_map_regs() might be desirable for a Type2 device, but we have no such user today. Patches welcome?
On Wed, 10 Nov 2021 09:30:40 -0800 Ben Widawsky <ben.widawsky@intel.com> wrote: > On 21-11-10 17:14:37, Jonathan Cameron wrote: > > On Fri, 15 Oct 2021 16:30:42 -0700 > > Dan Williams <dan.j.williams@intel.com> wrote: > > > > > From: Ben Widawsky <ben.widawsky@intel.com> > > > > > > In preparation for moving parts of register mapping to cxl_core, split > > > cxl_pci_setup_regs() into a helper that finds register blocks, > > > (cxl_find_regblock()), and a generic wrapper that probes the precise > > > register sets within a block (cxl_setup_regs()). > > > > > > Move the actual mapping (cxl_map_regs()) of the only register-set that > > > cxl_pci cares about (memory device registers) up a level from the former > > > cxl_pci_setup_regs() into cxl_pci_probe(). > > > > > > With this change the unused component registers are no longer mapped, > > > but the helpers are primed to move into the core. > > > > > > [djbw: drop cxl_map_regs() for component registers] > > > > > > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> > > > [djbw: rebase on the cxl_register_map refactor] > > > Reviewed-by: Ira Weiny <ira.weiny@intel.com> > > > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > > > > Hi Ben / all, > > > > This is probably the best patch to comment on for this > > (note it is not a comment about this patch, but more the state we end up > > in after it). > > > > cxl_map_regs() is a generic function, but with the new split approach > > as a result of this patch, we now always know at the caller which of > > the types of map we are doing. > > > > I think it would be clearer to embrace that situation and drop cxl_map_regs() > > in favor of directly calling the relevant specific versions such as > > cxl_map_device_regs(). I can't immediately see how the generic cxl_map_regs() > > will be useful to us going forwards. > > > > Jonathan > > I completely agree. Long term, something like cxl_map_regs() might be desirable > for a Type2 device, but we have no such user today. Patches welcome? Sure, will do. J
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 7d5e5548b316..691a4e59ad8b 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -433,72 +433,69 @@ static void cxl_decode_regblock(u32 reg_lo, u32 reg_hi, } /** - * cxl_pci_setup_regs() - Setup necessary MMIO. - * @cxlm: The CXL memory device to communicate with. + * cxl_find_regblock() - Locate register blocks by type + * @pdev: The CXL PCI device to enumerate. + * @type: Register Block Indicator id + * @map: Enumeration output, clobbered on error * - * Return: 0 if all necessary registers mapped. + * Return: 0 if register block enumerated, negative error code otherwise * - * A memory device is required by spec to implement a certain set of MMIO - * regions. The purpose of this function is to enumerate and map those - * registers. + * A CXL DVSEC may point to one or more register blocks, search for them + * by @type. */ -static int cxl_pci_setup_regs(struct cxl_mem *cxlm) +static int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type, + struct cxl_register_map *map) { u32 regloc_size, regblocks; - int regloc, i, n_maps, ret = 0; - struct device *dev = cxlm->dev; - struct pci_dev *pdev = to_pci_dev(dev); - struct cxl_register_map *map, maps[CXL_REGLOC_RBI_TYPES]; + int regloc, i; regloc = cxl_pci_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID); - if (!regloc) { - dev_err(dev, "register location dvsec not found\n"); + if (!regloc) return -ENXIO; - } - /* Get the size of the Register Locator DVSEC */ pci_read_config_dword(pdev, regloc + PCI_DVSEC_HEADER1, ®loc_size); regloc_size = FIELD_GET(PCI_DVSEC_HEADER1_LENGTH_MASK, regloc_size); regloc += PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET; regblocks = (regloc_size - PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET) / 8; - for (i = 0, n_maps = 0; i < regblocks; i++, regloc += 8) { + for (i = 0; i < regblocks; i++, regloc += 8) { u32 reg_lo, reg_hi; pci_read_config_dword(pdev, regloc, ®_lo); pci_read_config_dword(pdev, regloc + 4, ®_hi); - map = &maps[n_maps]; cxl_decode_regblock(reg_lo, reg_hi, map); - /* Ignore unknown register block types */ - if (map->reg_type > CXL_REGLOC_RBI_MEMDEV) - continue; + if (map->reg_type == type) + return 0; + } - ret = cxl_map_regblock(pdev, map); - if (ret) - return ret; + return -ENODEV; +} - ret = cxl_probe_regs(pdev, map); - cxl_unmap_regblock(pdev, map); - if (ret) - return ret; +static int cxl_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type, + struct cxl_register_map *map) +{ + int rc; - n_maps++; - } + rc = cxl_find_regblock(pdev, type, map); + if (rc) + return rc; - for (i = 0; i < n_maps; i++) { - ret = cxl_map_regs(cxlm, &maps[i]); - if (ret) - break; - } + rc = cxl_map_regblock(pdev, map); + if (rc) + return rc; + + rc = cxl_probe_regs(pdev, map); + cxl_unmap_regblock(pdev, map); - return ret; + return rc; } static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { + struct cxl_register_map map; struct cxl_memdev *cxlmd; struct cxl_mem *cxlm; int rc; @@ -518,7 +515,11 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (IS_ERR(cxlm)) return PTR_ERR(cxlm); - rc = cxl_pci_setup_regs(cxlm); + rc = cxl_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map); + if (rc) + return rc; + + rc = cxl_map_regs(cxlm, &map); if (rc) return rc;