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[3/9] clk: qcom: ipq8074: Add missing bindings for pcie

Message ID 1593940680-2363-4-git-send-email-sivaprak@codeaurora.org
State New
Headers show
Series Add PCIe support for IPQ8074 | expand

Commit Message

Sivaprakash Murugesan July 5, 2020, 9:17 a.m. UTC 
Add missing clock bindings for pcie port0 of ipq8074.

Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
 include/dt-bindings/clock/qcom,gcc-ipq8074.h | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Stephen Boyd July 11, 2020, 4:12 p.m. UTC | #1 
Quoting Sivaprakash Murugesan (2020-07-05 02:17:54)
> Add missing clock bindings for pcie port0 of ipq8074.
> 
> Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
> Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
> ---

Applied to clk-next
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/qcom,gcc-ipq8074.h b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
index 4de4811a3540..e3e018565add 100644
--- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
@@ -362,5 +362,9 @@ 
 #define GCC_PCIE1_AXI_SLAVE_ARES		128
 #define GCC_PCIE1_AHB_ARES			129
 #define GCC_PCIE1_AXI_MASTER_STICKY_ARES	130
+#define GCC_PCIE0_AXI_SLAVE_STICKY_ARES		131
+#define GCC_PCIE0_AXI_S_BRIDGE_CLK		132
+#define GCC_PCIE0_RCHNG_CLK_SRC			133
+#define GCC_PCIE0_RCHNG_CLK			134
 
 #endif