diff mbox series

PCI/DPC: Allow Non-ACPI Native ports to use DPC

Message ID 1587067157-2291-1-git-send-email-jonathan.derrick@intel.com
State New
Headers show
Series PCI/DPC: Allow Non-ACPI Native ports to use DPC | expand

Commit Message

Jon Derrick April 16, 2020, 7:59 p.m. UTC
Some platforms have a mix of ports whose capabilities can be negotiated
by _OSC, and some ports which are not described by ACPI and instead
managed by Native drivers. The existing Firmware-First HEST model can
incorrectly tag these Native, Non-ACPI ports as Firmware-First capable
ports by advertising the HEST Global flag and specifying the type and
class (aer_hest_parse).

This ultimately can lead to bad situations if the BIOS or port firmware
leaves DPC preconfigured and the Linux DPC driver is unable to bind to
the port to handle DPC events.

This patch adds the check for Native DPC in the port's host bridge in
order to allow DPC services to bind to the port.

Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
---
 drivers/pci/pcie/dpc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Kuppuswamy, Sathyanarayanan April 16, 2020, 8:32 p.m. UTC | #1
Hi,

On 4/16/20 12:59 PM, Jon Derrick wrote:
> Some platforms have a mix of ports whose capabilities can be negotiated
> by _OSC, and some ports which are not described by ACPI and instead
> managed by Native drivers. The existing Firmware-First HEST model can
> incorrectly tag these Native, Non-ACPI ports as Firmware-First capable
> ports by advertising the HEST Global flag and specifying the type and
> class (aer_hest_parse).
> 
> This ultimately can lead to bad situations if the BIOS or port firmware
> leaves DPC preconfigured and the Linux DPC driver is unable to bind to
> the port to handle DPC events.
> 
> This patch adds the check for Native DPC in the port's host bridge in
> order to allow DPC services to bind to the port.
> 
> Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
> ---
>   drivers/pci/pcie/dpc.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
> index 7621704..a1e355d 100644
> --- a/drivers/pci/pcie/dpc.c
> +++ b/drivers/pci/pcie/dpc.c
> @@ -281,10 +281,12 @@ static int dpc_probe(struct pcie_device *dev)
>   {
>   	struct pci_dev *pdev = dev->port;
>   	struct device *device = &dev->device;
> +	struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus);
>   	int status;
>   	u16 ctl, cap;
>   
> -	if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
> +	if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native &&
For other PCIe services, this check is added in 
get_port_device_capability().
Why not add it there for DPC as well ?
> +	    !host->native_dpc)
>   		return -ENOTSUPP;
>   
>   	status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
>
Jon Derrick April 16, 2020, 8:50 p.m. UTC | #2
On Thu, 2020-04-16 at 13:32 -0700, Kuppuswamy, Sathyanarayanan wrote:
> Hi,
> 
> On 4/16/20 12:59 PM, Jon Derrick wrote:
> > Some platforms have a mix of ports whose capabilities can be negotiated
> > by _OSC, and some ports which are not described by ACPI and instead
> > managed by Native drivers. The existing Firmware-First HEST model can
> > incorrectly tag these Native, Non-ACPI ports as Firmware-First capable
> > ports by advertising the HEST Global flag and specifying the type and
> > class (aer_hest_parse).
> > 
> > This ultimately can lead to bad situations if the BIOS or port firmware
> > leaves DPC preconfigured and the Linux DPC driver is unable to bind to
> > the port to handle DPC events.
> > 
> > This patch adds the check for Native DPC in the port's host bridge in
> > order to allow DPC services to bind to the port.
> > 
> > Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
> > ---
> >   drivers/pci/pcie/dpc.c | 4 +++-
> >   1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
> > index 7621704..a1e355d 100644
> > --- a/drivers/pci/pcie/dpc.c
> > +++ b/drivers/pci/pcie/dpc.c
> > @@ -281,10 +281,12 @@ static int dpc_probe(struct pcie_device *dev)
> >   {
> >   	struct pci_dev *pdev = dev->port;
> >   	struct device *device = &dev->device;
> > +	struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus);
> >   	int status;
> >   	u16 ctl, cap;
> >   
> > -	if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
> > +	if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native &&
> For other PCIe services, this check is added in 
> get_port_device_capability().
> Why not add it there for DPC as well ?

Sure. Looking at this, it seems like it needs some more de-tangling to
fit into my model.

> > +	    !host->native_dpc)
> >   		return -ENOTSUPP;
> >   
> >   	status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
> >
diff mbox series

Patch

diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index 7621704..a1e355d 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -281,10 +281,12 @@  static int dpc_probe(struct pcie_device *dev)
 {
 	struct pci_dev *pdev = dev->port;
 	struct device *device = &dev->device;
+	struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus);
 	int status;
 	u16 ctl, cap;
 
-	if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
+	if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native &&
+	    !host->native_dpc)
 		return -ENOTSUPP;
 
 	status = devm_request_threaded_irq(device, dev->irq, dpc_irq,