diff mbox series

[RFC,V1,7/7] ims: Add the set_desc callback

Message ID 1568338328-22458-8-git-send-email-megha.dey@linux.intel.com
State Not Applicable
Delegated to: Bjorn Helgaas
Headers show
Series Add support for a new IMS interrupt mechanism | expand

Commit Message

Dey, Megha Sept. 13, 2019, 1:32 a.m. UTC 
Add the set_desc callback to the ims domain ops.

The set_desc callback is used to find a unique hwirq number from a given
domain.

Each mdev can have a maximum of 2048 IMS interrupts.

Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Sanjay Kumar <sanjay.k.kumar@intel.com>
Signed-off-by: Megha Dey <megha.dey@linux.intel.com>
---
 arch/x86/kernel/apic/ims.c | 7 +++++++
 drivers/base/ims-msi.c     | 9 +++++++++
 include/linux/msi.h        | 1 +
 3 files changed, 17 insertions(+)

Comments

Bjorn Helgaas Sept. 26, 2019, 9:47 p.m. UTC | #1 
On Thu, Sep 12, 2019 at 06:32:08PM -0700, Megha Dey wrote:
> Add the set_desc callback to the ims domain ops.

Elsewhere you capitalize "IMS" when it's an initialism.

Generally you capitalized "IRQ" and "MSI" in similar situations, but
there are a couple exceptions (in other commit logs).

> The set_desc callback is used to find a unique hwirq number from a given
> domain.
> 
> Each mdev can have a maximum of 2048 IMS interrupts.

Maybe you could mention where this limit comes from and whether it's
related to any #define in these patches?
diff mbox series

Patch

diff --git a/arch/x86/kernel/apic/ims.c b/arch/x86/kernel/apic/ims.c
index a539666..7e36571 100644
--- a/arch/x86/kernel/apic/ims.c
+++ b/arch/x86/kernel/apic/ims.c
@@ -76,11 +76,18 @@  int dev_ims_prepare(struct irq_domain *domain, struct device *dev, int nvec,
 }
 EXPORT_SYMBOL_GPL(dev_ims_prepare);
 
+void dev_ims_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
+{
+	arg->msi_hwirq = dev_ims_calc_hwirq(desc);
+}
+EXPORT_SYMBOL_GPL(dev_ims_set_desc);
+
 #ifdef CONFIG_IRQ_REMAP
 
 static struct msi_domain_ops dev_ims_domain_ops = {
 	.get_hwirq	= msi_get_hwirq,
 	.msi_prepare	= dev_ims_prepare,
+	.set_desc       = dev_ims_set_desc,
 };
 
 static struct irq_chip dev_ims_ir_controller = {
diff --git a/drivers/base/ims-msi.c b/drivers/base/ims-msi.c
index 3e579c9..48f3d24 100644
--- a/drivers/base/ims-msi.c
+++ b/drivers/base/ims-msi.c
@@ -22,6 +22,15 @@  struct dev_ims_priv_data {
 
 static DEFINE_IDA(dev_ims_devid_ida);
 
+irq_hw_number_t dev_ims_calc_hwirq(struct msi_desc *desc)
+{
+	u32 devid;
+
+	devid = desc->dev_ims.priv->devid;
+
+	return (devid << (32 - DEVIMS_ID_SHIFT)) | desc->dev_ims.ims_index;
+}
+
 u32 __dev_ims_desc_mask_irq(struct msi_desc *desc, u32 flag)
 {
 	u32 mask_bits = desc->dev_ims.masked;
diff --git a/include/linux/msi.h b/include/linux/msi.h
index 4543bbf..fe4678e 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -237,6 +237,7 @@  void dev_ims_teardown_irqs(struct device *dev);
 void dev_ims_restore_irqs(struct device *dev);
 int dev_ims_alloc_irqs(struct device *dev, int nvec, struct dev_ims_ops *ops);
 void dev_ims_free_irqs(struct device *dev);
+irq_hw_number_t dev_ims_calc_hwirq(struct msi_desc *desc);
 
 /*
  * The arch hooks to setup up msi irqs. Those functions are