From patchwork Sun Mar 11 11:19:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Gilboa X-Patchwork-Id: 884238 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mellanox.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zzfp965pPzB3X5 for ; Sun, 11 Mar 2018 23:00:49 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932214AbeCKMAs (ORCPT ); Sun, 11 Mar 2018 08:00:48 -0400 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:54486 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932126AbeCKMAs (ORCPT ); Sun, 11 Mar 2018 08:00:48 -0400 Received: from Internal Mail-Server by MTLPINE1 (envelope-from talgi@mellanox.com) with ESMTPS (AES256-SHA encrypted); 11 Mar 2018 13:20:41 +0200 Received: from gen-l-vrt-178.mtl.labs.mlnx (gen-l-vrt-178.mtl.labs.mlnx [10.137.178.1]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w2BBK7mN002892; Sun, 11 Mar 2018 13:20:07 +0200 Received: from gen-l-vrt-178.mtl.labs.mlnx (localhost [127.0.0.1]) by gen-l-vrt-178.mtl.labs.mlnx (8.14.7/8.14.7) with ESMTP id w2BBK6pp011197; Sun, 11 Mar 2018 13:20:06 +0200 Received: (from talgi@localhost) by gen-l-vrt-178.mtl.labs.mlnx (8.14.7/8.14.7/Submit) id w2BBK6Yu011196; Sun, 11 Mar 2018 13:20:06 +0200 From: Tal Gilboa To: Bjorn Helgaas Cc: Linux PCI , Tariq Toukan , Tal Gilboa Subject: [PATCH next V2 3/5] PCI: Print PCI device link status in kernel log Date: Sun, 11 Mar 2018 13:19:31 +0200 Message-Id: <1520767173-11090-4-git-send-email-talgi@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1520767173-11090-1-git-send-email-talgi@mellanox.com> References: <1520767173-11090-1-git-send-email-talgi@mellanox.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add pcie_print_link_status() function for querying and verifying a PCI device link status. The PCI speed and width are reported in kernel log. This provides a unified method for all PCI devices to report status and issues, instead of each device reporting in a different way, using different code. Signed-off-by: Tal Gilboa --- drivers/pci/pci.c | 25 +++++++++++++++++++++++++ include/linux/pci.h | 1 + 2 files changed, 26 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 48b9fd6..ac876c4 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5229,6 +5229,31 @@ int pcie_get_width_cap(struct pci_dev *dev, enum pcie_link_width *width) EXPORT_SYMBOL(pcie_get_width_cap); /** + * pcie_print_link_status - Reports the PCI device's link speed and width. + * @dev: PCI device to query + * + * This function checks whether the PCI device current speed and width are equal + * to the maximum PCI device capabilities. + */ +void pcie_print_link_status(struct pci_dev *dev) +{ + enum pcie_link_width width, width_cap; + enum pci_bus_speed speed, speed_cap; + + pcie_get_speed_cap(dev, &speed_cap); + pcie_get_width_cap(dev, &width_cap); + pcie_get_minimum_link(dev, &speed, &width); + + if (speed == speed_cap && width == width_cap) + pci_info(dev, "%s x%d link\n", PCIE_SPEED2STR(speed), width); + else + pci_info(dev, "%s x%d link (capable of %s x%d)\n", + PCIE_SPEED2STR(speed), width, + PCIE_SPEED2STR(speed_cap), width_cap); +} +EXPORT_SYMBOL(pcie_print_link_status); + +/** * pci_select_bars - Make BAR mask from the type of resource * @dev: the PCI device for which BAR mask is made * @flags: resource type mask to be selected diff --git a/include/linux/pci.h b/include/linux/pci.h index 8242d3d..4a20870 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1085,6 +1085,7 @@ int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, enum pcie_link_width *width); int pcie_get_speed_cap(struct pci_dev *dev, enum pci_bus_speed *speed); int pcie_get_width_cap(struct pci_dev *dev, enum pcie_link_width *width); +void pcie_print_link_status(struct pci_dev *dev); int pcie_flr(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev);