From patchwork Tue Feb 27 12:19:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Subrahmanya Lingappa X-Patchwork-Id: 878492 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mobiveil.co.in Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mobiveil.co.in header.i=@mobiveil.co.in header.b="M4PAO709"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zrHp83r9Bz9s1x for ; Tue, 27 Feb 2018 23:20:16 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753058AbeB0MUO (ORCPT ); Tue, 27 Feb 2018 07:20:14 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:33813 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753048AbeB0MUL (ORCPT ); Tue, 27 Feb 2018 07:20:11 -0500 Received: by mail-pf0-f196.google.com with SMTP id j20so4431327pfi.1 for ; Tue, 27 Feb 2018 04:20:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mobiveil.co.in; s=google; h=from:to:cc:subject:date:message-id; bh=flcLE2gjJh3avuBKpHm/xmwk1AffZar2/HNx+YO8cYI=; b=M4PAO709Inw8HVYnTyfnU/KV3VBr3OSueCONB5VzclsnklX52MNbIVWWhEZEzN5zES 8FFtgx4l+kBiDWtLly8UP0cMgOuWjgdnjwz32WW9STSoLUVuH4c3/GDY1npMyC7A0T60 fpPqCdhmafxadpC3Ph7iNz07fcysH5L4Rmk/Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=flcLE2gjJh3avuBKpHm/xmwk1AffZar2/HNx+YO8cYI=; b=U2SIvMFFpupNU0G5sZPREVi1cGl0ox8l6e5SnNbS1rOG6J6q14CLoB96szeFc0FHJe 0YWwZ+4q7AUmu3IyGDXGTXAT9rc6SaH3Z9d/XcJ+yGn/6gPm40mWmil77EMzv+cgorWg GaGH/HUoBYKkLJmyj4TH+BI3x+9xqMB4QJE9D5NkLYJbJc4Do48Sz6xxAFtd4A/e+D/n 635mm7CH74mm32CBJtBOZ5iS+DCBlWtldMVrScBfseawbTT+V+0mpfs110tZ/5/ai+AL 1LWCJ7737wMZvD8JorrnYgHCoVAHy+ovgBG+kS8GbDnQs8pfpN06TSZndSBbfZdlrH2z HpHA== X-Gm-Message-State: APf1xPDjlUYc1O+l7QhYeNN77MxDFK+1uD2Vch/uGESaPZu38RskMv3p TRzbx7rB60QIZqVPAiibTVivM9R8 X-Google-Smtp-Source: AH8x2257z2BjSovPSad51ZOmnTI/CT6uVPxHUwBuoP04lujPVWHBQBzsI3OCVBuhBWxx9h9PSJ8R0A== X-Received: by 10.101.73.7 with SMTP id p7mr11044474pgs.250.1519734010486; Tue, 27 Feb 2018 04:20:10 -0800 (PST) Received: from localhost.localdomain.localdomain ([49.207.50.162]) by smtp.gmail.com with ESMTPSA id w23sm22450988pfk.10.2018.02.27.04.20.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Feb 2018 04:20:09 -0800 (PST) From: Subrahmanya Lingappa To: linux-pci@vger.kernel.org, bhelgaas@google.com, lorenzo.pieralisi@arm.com Cc: mingkai.hu@nxp.com, peter.newton@nxp.com, minghuan.lian@nxp.com, rajesh.raina@nxp.com, rajan.kapoor@nxp.com, prabhjot.singh@nxp.com, Subrahmanya Lingappa , devicetree@vger.kernel.org Subject: [PATCH v6 1/3] PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver DT bindings Date: Tue, 27 Feb 2018 07:19:51 -0500 Message-Id: <1519733991-32198-1-git-send-email-l.subrahmanya@mobiveil.co.in> X-Mailer: git-send-email 1.8.3.1 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch adds the DT bindings for Mobiveil PCIe Host Bridge IP driver and updates the vendor prefixes file. Signed-off-by: Subrahmanya Lingappa Acked-by: Rob Herring Cc: Bjorn Helgaas Cc: Lorenzo Pieralisi Cc: linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org --- .../devicetree/bindings/pci/mobiveil-pcie.txt | 73 ++++++++++++++++++++++ .../devicetree/bindings/vendor-prefixes.txt | 1 + MAINTAINERS | 7 +++ 3 files changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/mobiveil-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt new file mode 100644 index 0000000..e9dd1e8 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt @@ -0,0 +1,73 @@ +* Mobiveil AXI PCIe Root Port Bridge DT description + +Mobiveil's GPEX 4.0 is a PCIe Gen4 root port bridge IP. This configurable IP +has up to 8 outbound and inbound windows for the address translation. + +Required properties: +- #address-cells: Address representation for root ports, set to <3> +- #size-cells: Size representation for root ports, set to <2> +- #interrupt-cells: specifies the number of cells needed to encode an + interrupt source. The value must be 1. +- compatible: Should contain "mbvl,gpex40-pcie" +- reg: Should contain PCIe registers location and length + "config_axi_slave": PCIe controller registers + "csr_axi_slave" : Bridge config registers + "gpio_slave" : GPIO registers to control slot power + "apb_csr" : MSI registers + +- device_type: must be "pci" +- apio-wins : number of requested apio outbound windows + default 2 outbound windows are configured - + 1. Config window + 2. Memory window +- ppio-wins : number of requested ppio inbound windows + default 1 inbound memory window is configured. +- bus-range: PCI bus numbers covered +- interrupt-controller: identifies the node as an interrupt controller +- #interrupt-cells: specifies the number of cells needed to encode an + interrupt source. The value must be 1. +- interrupt-parent : phandle to the interrupt controller that + it is attached to, it should be set to gic to point to + ARM's Generic Interrupt Controller node in system DT. +- interrupts: The interrupt line of the PCIe controller + last cell of this field is set to 4 to + denote it as IRQ_TYPE_LEVEL_HIGH type interrupt. +- interrupt-map-mask, + interrupt-map: standard PCI properties to define the mapping of the + PCI interface to interrupt numbers. +- ranges: ranges for the PCI memory regions (I/O space region is not + supported by hardware) + Please refer to the standard PCI bus binding document for a more + detailed explanation + + +Example: +++++++++ + pcie0: pcie@a0000000 { + #address-cells = <3>; + #size-cells = <2>; + compatible = "mbvl,gpex40-pcie"; + reg = <0xa0000000 0x00001000>, + <0xb0000000 0x00010000>, + <0xff000000 0x00200000>, + <0xb0010000 0x00001000>; + reg-names = "config_axi_slave", + "csr_axi_slave", + "gpio_slave", + "apb_csr"; + device_type = "pci"; + apio-wins = <2>; + ppio-wins = <1>; + bus-range = <0x00000000 0x000000ff>; + interrupt-controller; + interrupt-parent = <&gic>; + #interrupt-cells = <1>; + interrupts = < 0 89 4 >; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pci_express 1>, + <0 0 0 2 &pci_express 2>, + <0 0 0 3 &pci_express 3>, + <0 0 0 4 &pci_express 4>; + ranges = < 0x83000000 0 0x00000000 0xa8000000 0 0x8000000>; + + }; diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 0994bdd..8263cc7 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -197,6 +197,7 @@ lwn Liebherr-Werk Nenzing GmbH macnica Macnica Americas marvell Marvell Technology Group Ltd. maxim Maxim Integrated Products +mbvl Mobiveil Inc. mcube mCube meas Measurement Specialties mediatek MediaTek Inc. diff --git a/MAINTAINERS b/MAINTAINERS index 44512c3..b295080 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9162,6 +9162,13 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/ S: Maintained F: drivers/media/dvb-frontends/mn88473* +PCI DRIVER FOR MOBIVEIL PCIE IP +M: Subrahmanya Lingappa +L: linux-pci@vger.kernel.org +S: Supported +F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt +F: drivers/pci/host/pcie-mobiveil.c + MODULE SUPPORT M: Jessica Yu M: Rusty Russell