From patchwork Tue Aug 1 23:08:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feng Kan X-Patchwork-Id: 796437 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=apm.com header.i=@apm.com header.b="QoHqm2xv"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xMX6x56xCz9sxR for ; Wed, 2 Aug 2017 09:08:25 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751677AbdHAXIY (ORCPT ); Tue, 1 Aug 2017 19:08:24 -0400 Received: from mail-pg0-f53.google.com ([74.125.83.53]:36229 "EHLO mail-pg0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751533AbdHAXIX (ORCPT ); Tue, 1 Aug 2017 19:08:23 -0400 Received: by mail-pg0-f53.google.com with SMTP id v77so7949310pgb.3 for ; Tue, 01 Aug 2017 16:08:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id; bh=r7dpXRVXkx12pUSgyOgqvpnUrSLqo+A7rVPXEKkNg9I=; b=QoHqm2xvCHK9Ril2l8E669/1c5wwmA06wyCYY5SMK3pxNkqWAfuS0RGrC3pWnuaRRF BIESrYLr46fqk0iR58H9Sm+ioeZfpCbngYg7q/xps/JhxTJODbqGMfjRghWs3QC0kfXD 4j0o1wIFOJnVRnrVKNuNx+O2tf9rriOUbXvk4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=r7dpXRVXkx12pUSgyOgqvpnUrSLqo+A7rVPXEKkNg9I=; b=Cj8pa8qPn0FQ3JwCwoXT0AuPaA8sSxTA335OaSMMsMo2sIYAyrRkjxRmWnldBBP5oA Y7XWP7kzSYTlaLl8Hlr243/UP2blQVSSoK19UNwuXYtp1ZTkmPRRB3BsqG1H9HtyjRxo tfgRjPRrjVmmKsRiz/oe88cXjV8LGXavscjalRUH8ygbnEgZiapi2JPlkm7/V58nyGVE TUmxikU/tBBlYp7s6F3d0Om3P3rYQXSEcxKoPspUOWH1CPp2mSTwvGVG5UMaYqDzTSLe 0qw2PTQwP+rSRVHdHIFNc9ELqPDk3FCDdi/g9kvfsUewnxz5F1uumnIiKcYeVU3eSURD A7EQ== X-Gm-Message-State: AIVw111kZq4bBgeP9kwG+SFmFGICGL9xXmhBHBbycrBE9T8168xuGX0a aHrZ8QfAkZPXFBOg X-Received: by 10.99.95.133 with SMTP id t127mr20550735pgb.142.1501628902952; Tue, 01 Aug 2017 16:08:22 -0700 (PDT) Received: from goldengate.amcc.com ([206.80.4.98]) by smtp.gmail.com with ESMTPSA id v1sm20813121pfi.52.2017.08.01.16.08.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Aug 2017 16:08:21 -0700 (PDT) From: Feng Kan To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, bhelgaas@google.com, alex.williamson@redhat.com Cc: Feng Kan Subject: [PATCH V4] pci: quirk: Apply APM ACS quirk to XGene devices Date: Tue, 1 Aug 2017 16:08:13 -0700 Message-Id: <1501628893-28492-1-git-send-email-fkan@apm.com> X-Mailer: git-send-email 2.7.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The APM X-Gene PCIe root port does not support ACS at this point. However, the hw provides isolation and source validation through the SMMU. The stream ID generated by the PCIe ports contain both the BDF as well as the port ID in its 3 most significant bits. Turn on ACS but disable all the peer to peer features. Signed-off-by: Feng Kan Reviewed-by: Alex Williamson --- V4 Change: Remove TB & TD flags from ACS mask V3 Change: Add comment regarding unique port id in stream ID V2 Change: Move XGene ACS quirk to unique XGene function drivers/pci/quirks.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 085fb78..22343b3 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4120,6 +4120,18 @@ static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags) return acs_flags ? 0 : 1; } +static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags) +{ + /* + * XGene root matching this quirk do not allow peer-to-peer + * transactions with others, allowing masking out these bits as if they + * were unimplemented in the ACS capability. + */ + acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); + + return acs_flags ? 0 : 1; +} + /* * Many Intel PCH root ports do provide ACS-like features to disable peer * transactions and validate bus numbers in requests, but do not provide an @@ -4368,6 +4380,8 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) { 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */ /* Cavium ThunderX */ { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs }, + /* APM XGene */ + { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs }, { 0 } };