From patchwork Fri Jun 2 16:00:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oza Pawandeep X-Patchwork-Id: 770457 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wfTTM1qZXz9s7f for ; Sat, 3 Jun 2017 02:00:55 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.b="iQy5CU0U"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751247AbdFBQAq (ORCPT ); Fri, 2 Jun 2017 12:00:46 -0400 Received: from mail-pf0-f181.google.com ([209.85.192.181]:34487 "EHLO mail-pf0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751215AbdFBQAp (ORCPT ); Fri, 2 Jun 2017 12:00:45 -0400 Received: by mail-pf0-f181.google.com with SMTP id 9so51599643pfj.1 for ; Fri, 02 Jun 2017 09:00:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=iW2aRTeUzqbj1IskJ/faHPVJo1rDX57MA1sPrzYOP/g=; b=iQy5CU0U4ekb8lWO/lut8C8QzkeVhCOTHdgAeFrprCJMiSOqu+Gg5P6rowom61tPvc qGrVMQ2LWFzuvGPvoRPMENVzVOruYE3VmooUTKmQ6Hxh8uRwGK7UY4euvpqbfExbl78B Hw+HsFKHhp4/hTX+dHimGytn36Ay7CvwOxKBk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=iW2aRTeUzqbj1IskJ/faHPVJo1rDX57MA1sPrzYOP/g=; b=djiDAdAxY+yqDMEDRc9QhMjBcs4eiy5RnzosA+XVg2Q2sq6/GvcnG64iWVv3P/2pWy OFEj0rZbKuv53KV7C9aTjvjfdo0niZhmnkelmMRscqvtudmMQDMubhBMbIfR++2/4OEy bzsLpOjhcnFFHHhhVtxP/2S/BFRHvyC5FXLHEh/x6LtIPkCDdoItzkmN9ZmfevfkbIUn YRDJCPM6Tk24BWc9wlzYyZA5yAo97HbZtDbOkGS9HOR8DO9dIfCveeTdLlOhLgjftWe8 dwS5NuYLrOt19wZb1H7i1Nfq7Xq5h0u1SeiTjBQw4Da9UVA6aG+jHgsEOR0bjFzvbepZ RbWA== X-Gm-Message-State: AODbwcCJ2uIYpDsNKEaR1fbH2aHNpp5/+fmaJFtlw35XvZSGfrBMc5Vo b675Le9WkAFT6Rc/ X-Received: by 10.101.73.202 with SMTP id t10mr7811197pgs.28.1496419233459; Fri, 02 Jun 2017 09:00:33 -0700 (PDT) Received: from anjanavk-OptiPlex-7010.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id r14sm46503056pfe.9.2017.06.02.09.00.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 02 Jun 2017 09:00:32 -0700 (PDT) From: Oza Pawandeep To: Bjorn Helgaas , Ray Jui , Scott Branden , Jon Mason , bcm-kernel-feedback-list@broadcom.com, Oza Pawandeep , Andy Gospodarek , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Oza Pawandeep Subject: [PATCH v2 2/2] PCI: iproc: add device shutdown for PCI RC Date: Fri, 2 Jun 2017 21:30:16 +0530 Message-Id: <1496419216-9987-3-git-send-email-oza.oza@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1496419216-9987-1-git-send-email-oza.oza@broadcom.com> References: <1496419216-9987-1-git-send-email-oza.oza@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PERST# must be asserted around ~500ms before the reboot is applied. During soft reset (e.g., "reboot" from Linux) on some iProc based SoCs LCPLL clock and PERST both goes off simultaneously. This will cause certain Endpoints Intel NVMe not get detected, upon next boot sequence. This happens because; Endpoint is expecting the clock for some amount of time after PERST is asserted, which is not happening in our case (Compare to Intel X86 boards, will have clocks running). this cause NVMe to behave in undefined way. Essentially clock will remain alive for 500ms with PERST# = 0 before reboot. This patch adds platform shutdown where it should be called in device_shutdown while reboot command is issued. So in sequence first Endpoint Shutdown (e.g. nvme_shutdown) followed by RC shutdown is called, which issues safe PERST assertion. Signed-off-by: Oza Pawandeep Reviewed-by: Ray Jui Reviewed-by: Scott Branden diff --git a/drivers/pci/host/pcie-iproc-platform.c b/drivers/pci/host/pcie-iproc-platform.c index 90d2bdd..9512960 100644 --- a/drivers/pci/host/pcie-iproc-platform.c +++ b/drivers/pci/host/pcie-iproc-platform.c @@ -131,6 +131,13 @@ static int iproc_pcie_pltfm_remove(struct platform_device *pdev) return iproc_pcie_remove(pcie); } +static void iproc_pcie_pltfm_shutdown(struct platform_device *pdev) +{ + struct iproc_pcie *pcie = platform_get_drvdata(pdev); + + iproc_pcie_shutdown(pcie); +} + static struct platform_driver iproc_pcie_pltfm_driver = { .driver = { .name = "iproc-pcie", @@ -138,6 +145,7 @@ static int iproc_pcie_pltfm_remove(struct platform_device *pdev) }, .probe = iproc_pcie_pltfm_probe, .remove = iproc_pcie_pltfm_remove, + .shutdown = iproc_pcie_pltfm_shutdown, }; module_platform_driver(iproc_pcie_pltfm_driver); diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c index 05a3647..bb61376 100644 --- a/drivers/pci/host/pcie-iproc.c +++ b/drivers/pci/host/pcie-iproc.c @@ -608,32 +608,40 @@ static int iproc_pcie_config_write32(struct pci_bus *bus, unsigned int devfn, .write = iproc_pcie_config_write32, }; -static void iproc_pcie_reset(struct iproc_pcie *pcie) +static void iproc_pcie_perst_ctrl(struct iproc_pcie *pcie, bool assert) { u32 val; /* - * PAXC and the internal emulated endpoint device downstream should not - * be reset. If firmware has been loaded on the endpoint device at an - * earlier boot stage, reset here causes issues. + * The internal emulated endpoints (such as PAXC) device downstream + * should not be reset. If firmware has been loaded on the endpoint + * device at an earlier boot stage, reset here causes issues. */ if (pcie->ep_is_internal) return; - /* - * Select perst_b signal as reset source. Put the device into reset, - * and then bring it out of reset - */ - val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL); - val &= ~EP_PERST_SOURCE_SELECT & ~EP_MODE_SURVIVE_PERST & - ~RC_PCIE_RST_OUTPUT; - iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); - udelay(250); - - val |= RC_PCIE_RST_OUTPUT; - iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); - msleep(100); + if (assert) { + val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL); + val &= ~EP_PERST_SOURCE_SELECT & ~EP_MODE_SURVIVE_PERST & + ~RC_PCIE_RST_OUTPUT; + iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); + udelay(250); + } else { + val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL); + val |= RC_PCIE_RST_OUTPUT; + iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); + msleep(100); + } +} + +int iproc_pcie_shutdown(struct iproc_pcie *pcie) +{ + iproc_pcie_perst_ctrl(pcie, true); + msleep(500); + + return 0; } +EXPORT_SYMBOL(iproc_pcie_shutdown); static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus) { @@ -1310,7 +1318,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) goto err_exit_phy; } - iproc_pcie_reset(pcie); + iproc_pcie_perst_ctrl(pcie, true); + iproc_pcie_perst_ctrl(pcie, false); if (pcie->need_ob_cfg) { ret = iproc_pcie_map_ranges(pcie, res); diff --git a/drivers/pci/host/pcie-iproc.h b/drivers/pci/host/pcie-iproc.h index 0bbe2ea..a6b55ce 100644 --- a/drivers/pci/host/pcie-iproc.h +++ b/drivers/pci/host/pcie-iproc.h @@ -110,6 +110,7 @@ struct iproc_pcie { int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res); int iproc_pcie_remove(struct iproc_pcie *pcie); +int iproc_pcie_shutdown(struct iproc_pcie *pcie); #ifdef CONFIG_PCIE_IPROC_MSI int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node);