From patchwork Mon Nov 14 11:15:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 694472 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tHSdH4Qxcz9sCg for ; Mon, 14 Nov 2016 22:16:19 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="agr5Ubgq"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933006AbcKNLQS (ORCPT ); Mon, 14 Nov 2016 06:16:18 -0500 Received: from mail-wm0-f42.google.com ([74.125.82.42]:34889 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932810AbcKNLQP (ORCPT ); Mon, 14 Nov 2016 06:16:15 -0500 Received: by mail-wm0-f42.google.com with SMTP id a197so91504456wmd.0 for ; Mon, 14 Nov 2016 03:16:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nZh3Hsa5kWvH9RqdKupvbP86ON/EEbIrBgB9XSEXVCo=; b=agr5Ubgqaa/ga2nMUoOOSQeKUH1hN+0gnYXdlM9oxKvlQdEZgxP5YHX1LN1kPuOhma YZTUC+dbqfR/+vP/QTR/cIMP5NyomXC0HY/eCulf1sUJcV9gW5MTO4Ul6dqJQoYJnwyH ociu7FBOBuLCzjExh1piFkQyrNfuSfeaSZoYI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nZh3Hsa5kWvH9RqdKupvbP86ON/EEbIrBgB9XSEXVCo=; b=AlbH7jhvIoTZxxHqkOUF1MYZTs7l2rYdnIttItT207wg62VjE1ItJB4Fo5VP1QRoEn KxYO/Tm1Z7+YE70y2aFO3521TrNWWBQWsUfhtRlVYpQGowykEbqUtIOLmrBeyD3fgnj4 6Zcr2HqqHOI+Dj9ZH8WgLjyVWLhMI/uS4oP33IcxXVUBvPReMdeJ9X4YNZIjDvBbniIT RhKwUXXpTAnL2GCNjjLT+sSbyuaqVvXCaeMC0o/oT/xXsm2lVu5zrph5jZg+N6bu89Dh 6cXjiOAR9sGcv4/e4fSrsGz+bqnq7A8PcDrrqAcdGNEg07V/yAuocKjMMeVdoT+S3WJN 8WlA== X-Gm-Message-State: ABUngveHJUL82FFqX/QRwNZWIOkq0djEbdXw2gSmqkUlFlwkG8M2FK2I3eZUL5a91Dk2PAXu X-Received: by 10.28.191.130 with SMTP id o2mr2809011wmi.97.1479122174124; Mon, 14 Nov 2016 03:16:14 -0800 (PST) Received: from localhost.localdomain (host-2-98-102-117.as13285.net. [2.98.102.117]) by smtp.gmail.com with ESMTPSA id gk6sm28069027wjc.21.2016.11.14.03.16.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Nov 2016 03:16:12 -0800 (PST) From: Srinivas Kandagatla To: svarbanov@mm-sol.com, linux-pci@vger.kernel.org, bhelgaas@google.com Cc: robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, srinivas.kandagatla@linaro.org, devicetree@vger.kernel.org Subject: [PATCH v4 3/3] PCI: qcom: add runtime pm support to pcie_port Date: Mon, 14 Nov 2016 11:15:55 +0000 Message-Id: <1479122155-13393-4-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479122155-13393-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1479122155-13393-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch is required when the pcie controller sits on a bus with its own power domain and clocks which are controlled via a bus driver like simple pm bus. As these bus driver have runtime pm enabled, it makes sense to update the usage counter so that the runtime pm does not suspend the clks or power domain associated with the bus driver. Signed-off-by: Srinivas Kandagatla --- drivers/pci/host/pcie-qcom.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/host/pcie-qcom.c b/drivers/pci/host/pcie-qcom.c index 03ba6b1..c2ca848 100644 --- a/drivers/pci/host/pcie-qcom.c +++ b/drivers/pci/host/pcie-qcom.c @@ -587,6 +587,8 @@ static void qcom_pcie_host_init(struct pcie_port *pp) struct qcom_pcie *pcie = to_qcom_pcie(pp); int ret; + pm_runtime_get_sync(pp->dev); + qcom_ep_reset_assert(pcie); ret = pcie->ops->init(pcie); @@ -617,6 +619,7 @@ static void qcom_pcie_host_init(struct pcie_port *pp) phy_power_off(pcie->phy); err_deinit: pcie->ops->deinit(pcie); + pm_runtime_put_sync(pp->dev); } static int qcom_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, @@ -673,6 +676,7 @@ static int qcom_pcie_probe(struct platform_device *pdev) if (!pcie) return -ENOMEM; + pm_runtime_enable(dev); pp = &pcie->pp; pcie->ops = (struct qcom_pcie_ops *)of_device_get_match_data(dev);