diff mbox

PCI: rockchip: correct the use of FTS mask

Message ID 1476832384-10215-1-git-send-email-briannorris@chromium.org
State Accepted
Headers show

Commit Message

Brian Norris Oct. 18, 2016, 11:13 p.m. UTC
We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but
we're doing the inverse. That doesn't have too much effect, since we're
setting all the [23:8] bits to 1, and the other bits are only relevant
for modes we're currently not using. But we should get this right.

Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count")
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
 drivers/pci/host/pcie-rockchip.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Bjorn Helgaas Nov. 11, 2016, 10:30 p.m. UTC | #1
On Tue, Oct 18, 2016 at 04:13:04PM -0700, Brian Norris wrote:
> We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but
> we're doing the inverse. That doesn't have too much effect, since we're
> setting all the [23:8] bits to 1, and the other bits are only relevant
> for modes we're currently not using. But we should get this right.
> 
> Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count")
> Signed-off-by: Brian Norris <briannorris@chromium.org>

I assume this is correct, but I'm waiting for an ack from Shawn.

> ---
>  drivers/pci/host/pcie-rockchip.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
> index e0b22dab9b7a..5c2e3297a3ff 100644
> --- a/drivers/pci/host/pcie-rockchip.c
> +++ b/drivers/pci/host/pcie-rockchip.c
> @@ -492,7 +492,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
>  
>  	/* Fix the transmitted FTS count desired to exit from L0s. */
>  	status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL_PLC1);
> -	status = (status & PCIE_CORE_CTRL_PLC1_FTS_MASK) |
> +	status = (status & ~PCIE_CORE_CTRL_PLC1_FTS_MASK) |
>  		 (PCIE_CORE_CTRL_PLC1_FTS_CNT << PCIE_CORE_CTRL_PLC1_FTS_SHIFT);
>  	rockchip_pcie_write(rockchip, status, PCIE_CORE_CTRL_PLC1);
>  
> -- 
> 2.8.0.rc3.226.g39d4020
> 
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Shawn Lin Nov. 12, 2016, 1:57 a.m. UTC | #2
On 2016/11/12 6:30, Bjorn Helgaas wrote:
> On Tue, Oct 18, 2016 at 04:13:04PM -0700, Brian Norris wrote:
>> We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but
>> we're doing the inverse. That doesn't have too much effect, since we're
>> setting all the [23:8] bits to 1, and the other bits are only relevant
>> for modes we're currently not using. But we should get this right.
>>
>> Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count")
>> Signed-off-by: Brian Norris <briannorris@chromium.org>
>
> I assume this is correct, but I'm waiting for an ack from Shawn.

Thanks for catching this, and it was missing from my inbox somehow...

Acked-by: Shawn Lin <shawn.lin@rock-chips.com>

>
>> ---
>>  drivers/pci/host/pcie-rockchip.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
>> index e0b22dab9b7a..5c2e3297a3ff 100644
>> --- a/drivers/pci/host/pcie-rockchip.c
>> +++ b/drivers/pci/host/pcie-rockchip.c
>> @@ -492,7 +492,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
>>
>>  	/* Fix the transmitted FTS count desired to exit from L0s. */
>>  	status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL_PLC1);
>> -	status = (status & PCIE_CORE_CTRL_PLC1_FTS_MASK) |
>> +	status = (status & ~PCIE_CORE_CTRL_PLC1_FTS_MASK) |
>>  		 (PCIE_CORE_CTRL_PLC1_FTS_CNT << PCIE_CORE_CTRL_PLC1_FTS_SHIFT);
>>  	rockchip_pcie_write(rockchip, status, PCIE_CORE_CTRL_PLC1);
>>
>> --
>> 2.8.0.rc3.226.g39d4020
>>
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>
Bjorn Helgaas Nov. 14, 2016, 8:17 p.m. UTC | #3
On Tue, Oct 18, 2016 at 04:13:04PM -0700, Brian Norris wrote:
> We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but
> we're doing the inverse. That doesn't have too much effect, since we're
> setting all the [23:8] bits to 1, and the other bits are only relevant
> for modes we're currently not using. But we should get this right.
> 
> Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count")
> Signed-off-by: Brian Norris <briannorris@chromium.org>

Applied with Shawn's ack to pci/host-rockchip, thanks!

> ---
>  drivers/pci/host/pcie-rockchip.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
> index e0b22dab9b7a..5c2e3297a3ff 100644
> --- a/drivers/pci/host/pcie-rockchip.c
> +++ b/drivers/pci/host/pcie-rockchip.c
> @@ -492,7 +492,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
>  
>  	/* Fix the transmitted FTS count desired to exit from L0s. */
>  	status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL_PLC1);
> -	status = (status & PCIE_CORE_CTRL_PLC1_FTS_MASK) |
> +	status = (status & ~PCIE_CORE_CTRL_PLC1_FTS_MASK) |
>  		 (PCIE_CORE_CTRL_PLC1_FTS_CNT << PCIE_CORE_CTRL_PLC1_FTS_SHIFT);
>  	rockchip_pcie_write(rockchip, status, PCIE_CORE_CTRL_PLC1);
>  
> -- 
> 2.8.0.rc3.226.g39d4020
> 
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diff mbox

Patch

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index e0b22dab9b7a..5c2e3297a3ff 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -492,7 +492,7 @@  static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 
 	/* Fix the transmitted FTS count desired to exit from L0s. */
 	status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL_PLC1);
-	status = (status & PCIE_CORE_CTRL_PLC1_FTS_MASK) |
+	status = (status & ~PCIE_CORE_CTRL_PLC1_FTS_MASK) |
 		 (PCIE_CORE_CTRL_PLC1_FTS_CNT << PCIE_CORE_CTRL_PLC1_FTS_SHIFT);
 	rockchip_pcie_write(rockchip, status, PCIE_CORE_CTRL_PLC1);