From patchwork Fri Jan 15 14:27:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "qipeng.zha" X-Patchwork-Id: 567943 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0CB12140B0F for ; Fri, 15 Jan 2016 17:23:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750950AbcAOGXM (ORCPT ); Fri, 15 Jan 2016 01:23:12 -0500 Received: from mga02.intel.com ([134.134.136.20]:49306 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751136AbcAOGXB (ORCPT ); Fri, 15 Jan 2016 01:23:01 -0500 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP; 14 Jan 2016 22:23:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,298,1449561600"; d="scan'208";a="29753553" Received: from shbuild999.sh.intel.com ([10.239.146.206]) by fmsmga004.fm.intel.com with ESMTP; 14 Jan 2016 22:23:00 -0800 From: Qipeng Zha To: linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, bhelgaas@google.com, mika.westerberg@intel.com, Qi Zheng Subject: [PATCH 2/2] PCI/PM: enable runtime PM support for Intel Broxton platform. Date: Fri, 15 Jan 2016 22:27:45 +0800 Message-Id: <1452868065-96999-2-git-send-email-qipeng.zha@intel.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1452868065-96999-1-git-send-email-qipeng.zha@intel.com> References: <1452868065-96999-1-git-send-email-qipeng.zha@intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The PCIe runtime PM is disabled by default, add special treatment to allow runtime PM for Intel Broxton platform. Signed-off-by: Qi Zheng Signed-off-by: Qipeng Zha --- drivers/pci/quirks.c | 13 +++++++++++++ include/linux/pci_ids.h | 2 ++ 2 files changed, 15 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 7e32730..a745d06 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -25,6 +25,7 @@ #include #include #include +#include #include /* isa_dma_bridge_buggy */ #include "pci.h" @@ -2989,6 +2990,18 @@ static void quirk_intel_ntb(struct pci_dev *dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); + +/*PCIe ports on Intel Broxton should support runtime PM*/ +static void quirk_pcie_enable_rtpm(struct pci_dev *dev) +{ + pm_runtime_put_noidle(&dev->dev); + pm_runtime_allow(&dev->dev); +} +DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_INTEL, + PCI_DEVICE_ID_INTEL_BXT_B0_PCIe_0, quirk_pcie_enable_rtpm); +DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_INTEL, + PCI_DEVICE_ID_INTEL_BXT_B0_PCIe_1, quirk_pcie_enable_rtpm); + static ktime_t fixup_debug_start(struct pci_dev *dev, void (*fn)(struct pci_dev *dev)) { diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index d9ba49c..731f05f 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2596,6 +2596,8 @@ #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 #define PCI_DEVICE_ID_INTEL_IOAT 0x1a38 +#define PCI_DEVICE_ID_INTEL_BXT_B0_PCIe_0 0x1ad6 +#define PCI_DEVICE_ID_INTEL_BXT_B0_PCIe_1 0x1ad7 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40