From patchwork Fri Dec 11 05:06:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 555508 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 05A55140216 for ; Fri, 11 Dec 2015 16:12:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754369AbbLKFK0 (ORCPT ); Fri, 11 Dec 2015 00:10:26 -0500 Received: from aserp1040.oracle.com ([141.146.126.69]:47461 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752760AbbLKFKY (ORCPT ); Fri, 11 Dec 2015 00:10:24 -0500 Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by aserp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id tBB589tp007796 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 11 Dec 2015 05:08:10 GMT Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by userv0021.oracle.com (8.13.8/8.13.8) with ESMTP id tBB589O9028134 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Fri, 11 Dec 2015 05:08:09 GMT Received: from abhmp0011.oracle.com (abhmp0011.oracle.com [141.146.116.17]) by aserv0122.oracle.com (8.13.8/8.13.8) with ESMTP id tBB588D7003228; Fri, 11 Dec 2015 05:08:08 GMT Received: from linux-siqj.site (/69.181.250.163) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Thu, 10 Dec 2015 21:08:08 -0800 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Wei Yang , TJ , Yijing Wang , Khalid Aziz Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v9 57/60] PCI, x86: Add pci=assign_pref_bars to reallocate pref BARs Date: Thu, 10 Dec 2015 21:06:53 -0800 Message-Id: <1449810416-2950-58-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1449810416-2950-1-git-send-email-yinghai@kernel.org> References: <1449810416-2950-1-git-send-email-yinghai@kernel.org> X-Source-IP: userv0021.oracle.com [156.151.31.71] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Now some BIOS tend to allocate pref MMIO under non-pref MMIO, or allocate 64bit pref MMIO under 4G. Add pci=assign_pref_bars to clear and allocate resource to pref BARS. So could reallocate pref mmio64 above 4G and pref under bridges pref BARs. Signed-off-by: Yinghai Lu --- arch/x86/include/asm/pci_x86.h | 1 + arch/x86/pci/common.c | 3 +++ arch/x86/pci/i386.c | 56 ++++++++++++++++++++++++++---------------- 3 files changed, 39 insertions(+), 21 deletions(-) diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index 81a7abf..23bc5d6 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -34,6 +34,7 @@ do { \ #define PCI_NOASSIGN_ROMS 0x80000 #define PCI_ROOT_NO_CRS 0x100000 #define PCI_NOASSIGN_BARS 0x200000 +#define PCI_ASSIGN_PREF_BARS 0x400000 extern unsigned int pci_probe; extern unsigned long pirq_table_addr; diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 70de6d1..0d9112d 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -606,6 +606,9 @@ char *__init pcibios_setup(char *str) } else if (!strcmp(str, "assign-busses")) { pci_probe |= PCI_ASSIGN_ALL_BUSSES; return NULL; + } else if (!strcmp(str, "assign_pref_bars")) { + pci_probe |= PCI_ASSIGN_PREF_BARS; + return NULL; } else if (!strcmp(str, "use_crs")) { pci_probe |= PCI_USE__CRS; return NULL; diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 21f3e3e..6f27780 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -228,16 +228,25 @@ static void pcibios_allocate_bridge_resources(struct pci_dev *dev) continue; if (r->parent) /* Already allocated */ continue; - if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) { - /* - * Something is wrong with the region. - * Invalidate the resource to prevent - * child resource allocations in this - * range. - */ - r->start = r->end = 0; - r->flags = 0; - } + + if ((r->flags & IORESOURCE_PREFETCH) && + (pci_probe & PCI_ASSIGN_PREF_BARS)) + goto clear; + + if (!r->start) + goto clear; + + if (pci_claim_bridge_resource(dev, idx) == 0) + continue; + +clear: + /* + * Something is wrong with the region. + * Invalidate the resource to prevent + * child resource allocations in this range. + */ + r->start = r->end = 0; + r->flags = 0; } } @@ -283,21 +292,26 @@ static void pcibios_allocate_dev_resources(struct pci_dev *dev, int pass) else disabled = !(command & PCI_COMMAND_MEMORY); if (pass == disabled) { + if ((r->flags & IORESOURCE_PREFETCH) && + (pci_probe & PCI_ASSIGN_PREF_BARS)) + goto clear; + dev_dbg(&dev->dev, "BAR %d: reserving %pr (d=%d, p=%d)\n", idx, r, disabled, pass); - if (pci_claim_resource(dev, idx) < 0) { - if (r->flags & IORESOURCE_PCI_FIXED) { - dev_info(&dev->dev, "BAR %d %pR is immovable\n", - idx, r); - } else { - /* We'll assign a new address later */ - pcibios_save_fw_addr(dev, - idx, r->start); - r->end -= r->start; - r->start = 0; - } + if (pci_claim_resource(dev, idx) == 0) + continue; + if (r->flags & IORESOURCE_PCI_FIXED) { + dev_info(&dev->dev, "BAR %d %pR is immovable\n", + idx, r); + continue; } + +clear: + /* We'll assign a new address later */ + pcibios_save_fw_addr(dev, idx, r->start); + r->end -= r->start; + r->start = 0; } } if (!pass) {