From patchwork Tue Oct 27 20:55:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 536957 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8550D140323 for ; Wed, 28 Oct 2015 08:16:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965515AbbJ0U4t (ORCPT ); Tue, 27 Oct 2015 16:56:49 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:36851 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965359AbbJ0U4s (ORCPT ); Tue, 27 Oct 2015 16:56:48 -0400 Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by aserp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id t9RKuZIN002381 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 27 Oct 2015 20:56:36 GMT Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by userv0021.oracle.com (8.13.8/8.13.8) with ESMTP id t9RKuZpQ002244 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Tue, 27 Oct 2015 20:56:35 GMT Received: from abhmp0017.oracle.com (abhmp0017.oracle.com [141.146.116.23]) by userv0121.oracle.com (8.13.8/8.13.8) with ESMTP id t9RKuYbw000569; Tue, 27 Oct 2015 20:56:35 GMT Received: from aserv0021.oracle.com (/10.132.126.176) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 27 Oct 2015 13:56:34 -0700 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Wei Yang , TJ , Yijing Wang , Khalid Aziz Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v8 14/61] PCI: Add has_mem64 for struct host_bridge Date: Tue, 27 Oct 2015 13:55:06 -0700 Message-Id: <1445979353-1728-15-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1445979353-1728-1-git-send-email-yinghai@kernel.org> References: <1445979353-1728-1-git-send-email-yinghai@kernel.org> X-Source-IP: userv0021.oracle.com [156.151.31.71] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add has_mem64 for struct host_bridge, on root bus that does not support mmio64 above 4g, will not set that. We will use that info next two following patches: 1. Don't treat non-pref mmio64 as pref mmio, so will not put it under bridge's pref range when rescan the devices 2. will keep pref mmio64 and pref mmio32 under bridge pref bar. Signed-off-by: Yinghai Lu Tested-by: Khalid Aziz --- drivers/pci/probe.c | 7 +++++++ include/linux/pci.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 2c69441..edc8d08 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2125,6 +2125,13 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, } else bus_addr[0] = '\0'; dev_info(&b->dev, "root bus resource %pR%s\n", res, bus_addr); + + if (resource_type(res) == IORESOURCE_MEM) { + if ((res->end - offset) > 0xffffffff) + bridge->has_mem64 = 1; + if ((res->start - offset) > 0xffffffff) + res->flags |= IORESOURCE_MEM_64; + } } down_write(&pci_bus_sem); diff --git a/include/linux/pci.h b/include/linux/pci.h index f7468f7..cffaed4 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -413,6 +413,7 @@ struct pci_host_bridge { void (*release_fn)(struct pci_host_bridge *); void *release_data; unsigned int ignore_reset_delay:1; /* for entire hierarchy */ + unsigned int has_mem64:1; }; #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)