From patchwork Thu Sep 17 22:41:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Daney X-Patchwork-Id: 519055 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 757C014012C for ; Fri, 18 Sep 2015 08:42:35 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=vFFMSKfh; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751906AbbIQWmN (ORCPT ); Thu, 17 Sep 2015 18:42:13 -0400 Received: from mail-ig0-f178.google.com ([209.85.213.178]:34850 "EHLO mail-ig0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751907AbbIQWlo (ORCPT ); Thu, 17 Sep 2015 18:41:44 -0400 Received: by igbkq10 with SMTP id kq10so6101683igb.0; Thu, 17 Sep 2015 15:41:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Oc3sJx4VVGprYLFwreJUNLqupCpXTZtsBM1MbWymR5I=; b=vFFMSKfhrAAwOjHAVHDs7KkVcNqrt0XZkYWJXy0dRCJrnL+NtuO8kpGe3hqySTzTv5 leZZeZqKTx23Utddzk7WBpeVHQPDm3XzUlsf0eYDJbVqp1JYiX6zWWzc7TSkYHG73GiK gXkGwpruEcoY4Fax9gjpMSUAXQBptKrOSCfJL0oZX/UN36hjSiWEC0b3Xc/2w7JfFdG1 vItr+LwUznZYayWDkA1Z1J+h8mRlRnZAgipBzy+EchqRtcQQW9k7y3Hr1M+Yls0jgG0i tr/kh1JDBEh4GFEh3mRD9NRQ7HCD1yVJeuimuomw4I1Lor8NUPpU+0J5FduPKj3PHIJJ Ywdg== X-Received: by 10.50.126.2 with SMTP id mu2mr7921877igb.4.1442529703569; Thu, 17 Sep 2015 15:41:43 -0700 (PDT) Received: from dl.caveonetworks.com (64.2.3.194.ptr.us.xo.net. [64.2.3.194]) by smtp.gmail.com with ESMTPSA id s36sm2325890ioi.21.2015.09.17.15.41.40 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 17 Sep 2015 15:41:41 -0700 (PDT) Received: from dl.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dl.caveonetworks.com (8.14.5/8.14.5) with ESMTP id t8HMfdp8001841; Thu, 17 Sep 2015 15:41:39 -0700 Received: (from ddaney@localhost) by dl.caveonetworks.com (8.14.5/8.14.5/Submit) id t8HMfdTF001840; Thu, 17 Sep 2015 15:41:39 -0700 From: David Daney To: linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-pci@vger.kernel.org, Will Deacon , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Marc Zyngier Cc: David Daney Subject: [PATCH 3/3] PCI: generic: Add support for Cavium ThunderX PCIe root complexes. Date: Thu, 17 Sep 2015 15:41:34 -0700 Message-Id: <1442529694-1792-4-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1442529694-1792-1-git-send-email-ddaney.cavm@gmail.com> References: <1442529694-1792-1-git-send-email-ddaney.cavm@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: David Daney The config space for external PCIe root complexes on some Cavium ThunderX SoCs is very similar to CAM and ECAM, but differs in the shift values that have to be applied to the bus and devfn numbers to compose that address window offset. These root complexes also have the interesting property that there is no root bridge, so the standard manner of limiting scanning to only the first device doesn't work. We can use the standard pci-host-generic driver if we make a minor addition to handle these differences, so we... Add a mapping function for ThunderX PCIe root complexes with a bus shift of 24 and devfn shift of 16. Ignore accesses for devices other than the first device on the primary bus. Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt Signed-off-by: David Daney --- .../devicetree/bindings/pci/host-generic-pci.txt | 8 +++--- drivers/pci/host/pci-host-generic.c | 29 ++++++++++++++++++++++ 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.txt b/Documentation/devicetree/bindings/pci/host-generic-pci.txt index 105a968..a5aed0f 100644 --- a/Documentation/devicetree/bindings/pci/host-generic-pci.txt +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.txt @@ -14,9 +14,11 @@ tree bindings communicated in pci.txt: Properties of the host controller node: -- compatible : Must be "pci-host-cam-generic" or "pci-host-ecam-generic" - depending on the layout of configuration space (CAM vs - ECAM respectively). +- compatible : One of the following with bus:devfn:reg mapped to the + PCI config space address window in the bit positions shown: + "pci-host-cam-generic" -- 'CAM' bits 16:8:0 + "pci-host-ecam-generic" -- 'ECAM' bits 20:12:0 + "cavium,pci-host-thunder-pem" -- bits 24:16:0 - device_type : Must be "pci". diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c index e364232..e1d8d5b 100644 --- a/drivers/pci/host/pci-host-generic.c +++ b/drivers/pci/host/pci-host-generic.c @@ -91,6 +91,32 @@ static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = { } }; +static void __iomem *gen_pci_map_cfg_bus_thunder_pem(struct pci_bus *bus, + unsigned int devfn, + int where) +{ + struct gen_pci *pci = bus->sysdata; + resource_size_t idx = bus->number - pci->cfg.bus_range->start; + + /* + * Thunder PEM is a PCIe RC, but without a root bridge. On + * the primary bus, ignore accesses for devices other than + * the first device. + */ + if (idx == 0 && (devfn & ~7u)) + return NULL; + return pci->cfg.win[idx] + ((devfn << 16) | where); +} + +static struct gen_pci_cfg_bus_ops gen_pci_cfg_thunder_pem_bus_ops = { + .bus_shift = 24, + .ops = { + .map_bus = gen_pci_map_cfg_bus_thunder_pem, + .read = pci_generic_config_read, + .write = pci_generic_config_write, + } +}; + static const struct of_device_id gen_pci_of_match[] = { { .compatible = "pci-host-cam-generic", .data = &gen_pci_cfg_cam_bus_ops }, @@ -98,6 +124,9 @@ static const struct of_device_id gen_pci_of_match[] = { { .compatible = "pci-host-ecam-generic", .data = &gen_pci_cfg_ecam_bus_ops }, + { .compatible = "cavium,pci-host-thunder-pem", + .data = &gen_pci_cfg_thunder_pem_bus_ops }, + { }, }; MODULE_DEVICE_TABLE(of, gen_pci_of_match);