From patchwork Tue Jul 14 22:47:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 495316 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id F32F2140788 for ; Wed, 15 Jul 2015 08:56:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751882AbbGNW4m (ORCPT ); Tue, 14 Jul 2015 18:56:42 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:46536 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754019AbbGNWxF (ORCPT ); Tue, 14 Jul 2015 18:53:05 -0400 Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by aserp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id t6EMloxi020320 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 14 Jul 2015 22:47:50 GMT Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0021.oracle.com (8.13.8/8.13.8) with ESMTP id t6EMlopD029306 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Tue, 14 Jul 2015 22:47:50 GMT Received: from abhmp0014.oracle.com (abhmp0014.oracle.com [141.146.116.20]) by userv0121.oracle.com (8.13.8/8.13.8) with ESMTP id t6EMlnUg018025; Tue, 14 Jul 2015 22:47:49 GMT Received: from linux-siqj.site.us.oracle.com (/10.132.127.48) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 14 Jul 2015 15:47:49 -0700 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Wei Yang , TJ , Yijing Wang Cc: Andrew Morton , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v2 34/49] PCI: Only treat non-pef mmio64 as pref if all bridges has MEM_64 Date: Tue, 14 Jul 2015 15:47:05 -0700 Message-Id: <1436914040-13206-35-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1436914040-13206-1-git-send-email-yinghai@kernel.org> References: <1436914040-13206-1-git-send-email-yinghai@kernel.org> X-Source-IP: aserv0021.oracle.com [141.146.126.233] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If any bridge up to root only have 32bit pref mmio, We don't need to treat device non-pref mmio64 as as pref mmio64. We need to move pci_bridge_check_ranges calling early. for parent bridges pref mmio BAR may not allocated by BIOS, res flags is still 0, we need to have it correct set before we check them for child device resources. Signed-off-by: Yinghai Lu --- drivers/pci/setup-bus.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 3a1d659..8a8e5a7 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1038,6 +1038,18 @@ int pci_claim_bridge_resource(struct pci_dev *bridge, int i) return -EINVAL; } +static bool pci_up_path_over_pref_mem64(struct pci_bus *bus) +{ + if (pci_is_root_bus(bus)) + return true; + + if (bus->self && !(bus->self->resource[PCI_BRIDGE_RESOURCES + 2].flags & + IORESOURCE_MEM_64)) + return false; + + return pci_up_path_over_pref_mem64(bus->parent); +} + int pci_resource_pref_compatible(const struct pci_dev *dev, struct resource *res) { @@ -1046,7 +1058,8 @@ int pci_resource_pref_compatible(const struct pci_dev *dev, if ((res->flags & IORESOURCE_MEM) && (res->flags & IORESOURCE_MEM_64) && - dev->on_all_pcie_path) + dev->on_all_pcie_path && + pci_up_path_over_pref_mem64(dev->bus)) return res->flags | IORESOURCE_PREFETCH; return res->flags; @@ -1816,6 +1829,10 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head) struct resource *b_res; int ret; + if (!pci_is_root_bus(bus) && + (bus->self->class >> 8) == PCI_CLASS_BRIDGE_PCI) + pci_bridge_check_ranges(bus); + list_for_each_entry(dev, &bus->devices, bus_list) { struct pci_bus *b = dev->subordinate; if (!b) @@ -1843,7 +1860,6 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head) break; case PCI_CLASS_BRIDGE_PCI: - pci_bridge_check_ranges(bus); if (bus->self->is_hotplug_bridge) { min_io_size = pci_hotplug_io_size; min_mem_size = pci_hotplug_mem_size;