From patchwork Mon Mar 9 02:34:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 447866 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DA40914010F for ; Mon, 9 Mar 2015 13:50:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753099AbbCICuF (ORCPT ); Sun, 8 Mar 2015 22:50:05 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:23601 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752931AbbCICnM (ORCPT ); Sun, 8 Mar 2015 22:43:12 -0400 Received: from 172.24.2.119 (EHLO szxeml433-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CKL80129; Mon, 09 Mar 2015 10:43:07 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml433-hub.china.huawei.com (10.82.67.210) with Microsoft SMTP Server id 14.3.158.1; Mon, 9 Mar 2015 10:42:45 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Jiang Liu , , Yinghai Lu , , Marc Zyngier , , Russell King , , Thomas Gleixner , Benjamin Herrenschmidt , Rusty Russell , Tony Luck , , "David S. Miller" , "Guan Xuetao" , , , Liviu Dudau , "Arnd Bergmann" , Geert Uytterhoeven , "Yijing Wang" , Bjorn Helgaas Subject: [PATCH v6 14/30] x86/PCI: Refine pci_acpi_scan_root() with generic pci_host_bridge Date: Mon, 9 Mar 2015 10:34:11 +0800 Message-ID: <1425868467-9667-15-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1425868467-9667-1-git-send-email-wangyijing@huawei.com> References: <1425868467-9667-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Signed-off-by: Yijing Wang CC: Thomas Gleixner CC: x86@kernel.org Signed-off-by: Bjorn Helgaas --- arch/x86/pci/acpi.c | 36 ++++++++++++++++++++---------------- 1 files changed, 20 insertions(+), 16 deletions(-) diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index ad0e926..e730d31 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -349,6 +349,18 @@ static void probe_pci_root_info(struct pci_root_info *info, entry->res->name = info->name; } +static int pci_host_bridge_prepare(struct pci_host_bridge *bridge) +{ + struct pci_sysdata *sd = dev_get_drvdata(&bridge->dev); + + ACPI_COMPANION_SET(&bridge->dev, sd->companion); + return 0; +} + +static struct pci_host_bridge_ops phb_ops = { + .prepare = pci_host_bridge_prepare, +}; + struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) { struct acpi_device *device = root->device; @@ -359,6 +371,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) LIST_HEAD(crs_res); LIST_HEAD(resources); struct pci_bus *bus; + struct pci_host_bridge *host = NULL; struct pci_sysdata *sd; int node; @@ -425,14 +438,13 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) if (!setup_mcfg_map(info, domain, (u8)root->secondary.start, (u8)root->secondary.end, root->mcfg_addr)) - bus = pci_create_root_bus(NULL, - PCI_DOMBUS(domain, busnum), &pci_root_ops, - sd, &resources); - - if (bus) { - pci_scan_child_bus(bus); - pci_set_host_bridge_release( - to_pci_host_bridge(bus->bridge), + host = pci_scan_host_bridge(NULL, + PCI_DOMBUS(domain, busnum), + &pci_root_ops, sd, &resources, &phb_ops); + + if (host) { + bus = host->bus; + pci_set_host_bridge_release(host, release_pci_root_info, info); } else { resource_list_free(&resources); @@ -456,14 +468,6 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) return bus; } -int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) -{ - struct pci_sysdata *sd = bridge->bus->sysdata; - - ACPI_COMPANION_SET(&bridge->dev, sd->companion); - return 0; -} - int __init pci_acpi_init(void) { struct pci_dev *dev = NULL;