diff mbox

PCI: rcar: Change macro name of PCIEPARL and PCIEPARH

Message ID 1423040575-28080-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com
State Accepted
Headers show

Commit Message

Nobuhiro Iwamatsu Feb. 4, 2015, 9:02 a.m. UTC
PCIEPARL and PCIEPARH are macro that calculates address of the register.
However, register name is incorrect, PCIEPALR and PCIEPAUR is correct.
This change macro name to PCIEPALR and PCIEPAUR.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
---
 drivers/pci/host/pcie-rcar.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Phil Edworthy Feb. 4, 2015, 9:14 a.m. UTC | #1
Hi Iwamatsu-san,

On: 04 February 2015 09:03, Nobuhiro Iwamatsu wrote:
> 
> PCIEPARL and PCIEPARH are macro that calculates address of the register.
> However, register name is incorrect, PCIEPALR and PCIEPAUR is correct.
> This change macro name to PCIEPALR and PCIEPAUR.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Phil Edworthy <phil.edworthy@renesas.com>

Thanks
Phil

> ---
>  drivers/pci/host/pcie-rcar.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
> index eb12659..183c32d 100644
> --- a/drivers/pci/host/pcie-rcar.c
> +++ b/drivers/pci/host/pcie-rcar.c
> @@ -64,8 +64,8 @@
>  #define  LAR_ENABLE		(1 << 1)
> 
>  /* PCIe address reg & mask */
> -#define PCIEPARL(x)		(0x03400 + ((x) * 0x20))
> -#define PCIEPARH(x)		(0x03404 + ((x) * 0x20))
> +#define PCIEPALR(x)		(0x03400 + ((x) * 0x20))
> +#define PCIEPAUR(x)		(0x03404 + ((x) * 0x20))
>  #define PCIEPAMR(x)		(0x03408 + ((x) * 0x20))
>  #define PCIEPTCTLR(x)		(0x0340c + ((x) * 0x20))
>  #define  PAR_ENABLE		(1 << 31)
> @@ -341,9 +341,9 @@ static void rcar_pcie_setup_window(int win, struct
> rcar_pcie *pcie)
>  	else
>  		res_start = res->start;
> 
> -	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
> +	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win));
>  	rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
> -			   PCIEPARL(win));
> +			   PCIEPALR(win));
> 
>  	/* First resource is for IO */
>  	mask = PAR_ENABLE;
> --
> 2.1.3

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Simon Horman Feb. 5, 2015, 12:35 a.m. UTC | #2
On Wed, Feb 04, 2015 at 09:14:40AM +0000, Phil Edworthy wrote:
> Hi Iwamatsu-san,
> 
> On: 04 February 2015 09:03, Nobuhiro Iwamatsu wrote:
> > 
> > PCIEPARL and PCIEPARH are macro that calculates address of the register.
> > However, register name is incorrect, PCIEPALR and PCIEPAUR is correct.
> > This change macro name to PCIEPALR and PCIEPAUR.
> > 
> > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
> Acked-by: Phil Edworthy <phil.edworthy@renesas.com>

Acked-by: Simon Horman <horms+renesas@verge.net.au>

> 
> Thanks
> Phil
> 
> > ---
> >  drivers/pci/host/pcie-rcar.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
> > index eb12659..183c32d 100644
> > --- a/drivers/pci/host/pcie-rcar.c
> > +++ b/drivers/pci/host/pcie-rcar.c
> > @@ -64,8 +64,8 @@
> >  #define  LAR_ENABLE		(1 << 1)
> > 
> >  /* PCIe address reg & mask */
> > -#define PCIEPARL(x)		(0x03400 + ((x) * 0x20))
> > -#define PCIEPARH(x)		(0x03404 + ((x) * 0x20))
> > +#define PCIEPALR(x)		(0x03400 + ((x) * 0x20))
> > +#define PCIEPAUR(x)		(0x03404 + ((x) * 0x20))
> >  #define PCIEPAMR(x)		(0x03408 + ((x) * 0x20))
> >  #define PCIEPTCTLR(x)		(0x0340c + ((x) * 0x20))
> >  #define  PAR_ENABLE		(1 << 31)
> > @@ -341,9 +341,9 @@ static void rcar_pcie_setup_window(int win, struct
> > rcar_pcie *pcie)
> >  	else
> >  		res_start = res->start;
> > 
> > -	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
> > +	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win));
> >  	rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
> > -			   PCIEPARL(win));
> > +			   PCIEPALR(win));
> > 
> >  	/* First resource is for IO */
> >  	mask = PAR_ENABLE;
> > --
> > 2.1.3
> 
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Simon Horman Feb. 24, 2015, 2:03 a.m. UTC | #3
On Wed, Feb 04, 2015 at 06:02:55PM +0900, Nobuhiro Iwamatsu wrote:
> PCIEPARL and PCIEPARH are macro that calculates address of the register.
> However, register name is incorrect, PCIEPALR and PCIEPAUR is correct.
> This change macro name to PCIEPALR and PCIEPAUR.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

Acked-by: Simon Horman <horms+renesas@verge.net.au>

> ---
>  drivers/pci/host/pcie-rcar.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
> index eb12659..183c32d 100644
> --- a/drivers/pci/host/pcie-rcar.c
> +++ b/drivers/pci/host/pcie-rcar.c
> @@ -64,8 +64,8 @@
>  #define  LAR_ENABLE		(1 << 1)
>  
>  /* PCIe address reg & mask */
> -#define PCIEPARL(x)		(0x03400 + ((x) * 0x20))
> -#define PCIEPARH(x)		(0x03404 + ((x) * 0x20))
> +#define PCIEPALR(x)		(0x03400 + ((x) * 0x20))
> +#define PCIEPAUR(x)		(0x03404 + ((x) * 0x20))
>  #define PCIEPAMR(x)		(0x03408 + ((x) * 0x20))
>  #define PCIEPTCTLR(x)		(0x0340c + ((x) * 0x20))
>  #define  PAR_ENABLE		(1 << 31)
> @@ -341,9 +341,9 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
>  	else
>  		res_start = res->start;
>  
> -	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
> +	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win));
>  	rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
> -			   PCIEPARL(win));
> +			   PCIEPALR(win));
>  
>  	/* First resource is for IO */
>  	mask = PAR_ENABLE;
> -- 
> 2.1.3
> 
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Bjorn Helgaas Feb. 24, 2015, 6:26 a.m. UTC | #4
On Wed, Feb 04, 2015 at 06:02:55PM +0900, Nobuhiro Iwamatsu wrote:
> PCIEPARL and PCIEPARH are macro that calculates address of the register.
> However, register name is incorrect, PCIEPALR and PCIEPAUR is correct.
> This change macro name to PCIEPALR and PCIEPAUR.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

Applied to pci/host-rcar for v4.1, thanks!

> ---
>  drivers/pci/host/pcie-rcar.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
> index eb12659..183c32d 100644
> --- a/drivers/pci/host/pcie-rcar.c
> +++ b/drivers/pci/host/pcie-rcar.c
> @@ -64,8 +64,8 @@
>  #define  LAR_ENABLE		(1 << 1)
>  
>  /* PCIe address reg & mask */
> -#define PCIEPARL(x)		(0x03400 + ((x) * 0x20))
> -#define PCIEPARH(x)		(0x03404 + ((x) * 0x20))
> +#define PCIEPALR(x)		(0x03400 + ((x) * 0x20))
> +#define PCIEPAUR(x)		(0x03404 + ((x) * 0x20))
>  #define PCIEPAMR(x)		(0x03408 + ((x) * 0x20))
>  #define PCIEPTCTLR(x)		(0x0340c + ((x) * 0x20))
>  #define  PAR_ENABLE		(1 << 31)
> @@ -341,9 +341,9 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
>  	else
>  		res_start = res->start;
>  
> -	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
> +	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win));
>  	rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
> -			   PCIEPARL(win));
> +			   PCIEPALR(win));
>  
>  	/* First resource is for IO */
>  	mask = PAR_ENABLE;
> -- 
> 2.1.3
> 
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diff mbox

Patch

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index eb12659..183c32d 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -64,8 +64,8 @@ 
 #define  LAR_ENABLE		(1 << 1)
 
 /* PCIe address reg & mask */
-#define PCIEPARL(x)		(0x03400 + ((x) * 0x20))
-#define PCIEPARH(x)		(0x03404 + ((x) * 0x20))
+#define PCIEPALR(x)		(0x03400 + ((x) * 0x20))
+#define PCIEPAUR(x)		(0x03404 + ((x) * 0x20))
 #define PCIEPAMR(x)		(0x03408 + ((x) * 0x20))
 #define PCIEPTCTLR(x)		(0x0340c + ((x) * 0x20))
 #define  PAR_ENABLE		(1 << 31)
@@ -341,9 +341,9 @@  static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
 	else
 		res_start = res->start;
 
-	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
+	rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win));
 	rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
-			   PCIEPARL(win));
+			   PCIEPALR(win));
 
 	/* First resource is for IO */
 	mask = PAR_ENABLE;