From patchwork Wed Jan 21 00:30:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 431333 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 2D94D1401AC for ; Wed, 21 Jan 2015 13:39:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753261AbbAUCiV (ORCPT ); Tue, 20 Jan 2015 21:38:21 -0500 Received: from szxga01-in.huawei.com ([119.145.14.64]:55649 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753674AbbAUCco (ORCPT ); Tue, 20 Jan 2015 21:32:44 -0500 Received: from 172.24.2.119 (EHLO szxeml433-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CIF99743; Wed, 21 Jan 2015 10:32:26 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml433-hub.china.huawei.com (10.82.67.210) with Microsoft SMTP Server id 14.3.158.1; Wed, 21 Jan 2015 10:32:18 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Jiang Liu , , Yinghai Lu , , Marc Zyngier , , Russell King , , Thomas Gleixner , Benjamin Herrenschmidt , Rusty Russell , Tony Luck , , "David S. Miller" , "Guan Xuetao" , , , Liviu Dudau , "Arnd Bergmann" , Geert Uytterhoeven , "Yijing Wang" Subject: [PATCH v2 12/30] PCI: Introduce pci_host_bridge_ops to support host specific operations Date: Wed, 21 Jan 2015 08:30:07 +0800 Message-ID: <1421800225-26230-13-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1421800225-26230-1-git-send-email-wangyijing@huawei.com> References: <1421800225-26230-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Now we have weak functions like pcibios_root_bridge_prepare() to setup pci host bridge, We could introduce pci_host_bridge_ops which contain host bridge specific ops to setup pci_host_bridge. Then host bridge driver could add pci_host_bridge_ops hooks intead of weak function to setup pci_host_bridge. This patch add following pci_host_bridge_ops hooks: pci_host_bridge_ops { /* set root bus speed, some platform need this like powerpc */ void (*phb_set_root_bus_speed)(struct pci_host_bridge *host); /* setup pci_host_bridge before pci_host_bridge be added to driver core */ int (*phb_prepare)(struct pci_host_bridge *host); /* platform specific of scan hook to scan pci device */ void (*phb_of_scan_bus)(struct pci_host_bridge *); } We could easily extend it to support different host bridge specific operations. Signed-off-by: Yijing Wang --- drivers/pci/host-bridge.c | 12 ++++++++++-- drivers/pci/probe.c | 17 +++++++++++------ include/linux/pci.h | 12 ++++++++++-- 3 files changed, 31 insertions(+), 10 deletions(-) diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c index 91b354b..26cefce 100644 --- a/drivers/pci/host-bridge.c +++ b/drivers/pci/host-bridge.c @@ -23,8 +23,8 @@ static void pci_release_host_bridge_dev(struct device *dev) } struct pci_host_bridge *pci_create_host_bridge( - struct device *parent, u32 db, - struct list_head *resources, void *sysdata) + struct device *parent, u32 db, struct list_head *resources, + void *sysdata, struct pci_host_bridge_ops *ops) { int error; int bus = PCI_BUSNUM(db); @@ -56,6 +56,7 @@ struct pci_host_bridge *pci_create_host_bridge( } mutex_unlock(&phb_mutex); + host->ops = ops; host->dev.parent = parent; INIT_LIST_HEAD(&host->windows); host->dev.release = pci_release_host_bridge_dev; @@ -63,6 +64,13 @@ struct pci_host_bridge *pci_create_host_bridge( dev_set_name(&host->dev, "pci%04x:%02x", host->domain, host->busnum); + if (host->ops && host->ops->phb_prepare) { + error = host->ops->phb_prepare(host); + if(error) { + kfree(host); + return NULL; + } + } error = device_register(&host->dev); if (error) { put_device(&host->dev); diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 103ef69..ca53c37 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1888,6 +1888,8 @@ static struct pci_bus *__pci_create_root_bus( bridge->bus = b; b->bridge = get_device(&bridge->dev); + if (bridge->ops && bridge->ops->phb_set_root_bus_speed) + bridge->ops->phb_set_root_bus_speed(bridge); error = pcibios_root_bridge_prepare(bridge); if (error) goto err_out; @@ -1953,7 +1955,7 @@ struct pci_bus *pci_create_root_bus(struct device *parent, u32 db, { struct pci_host_bridge *host; - host = pci_create_host_bridge(parent, db, resources, sysdata); + host = pci_create_host_bridge(parent, db, resources, sysdata, NULL); if (!host) return NULL; @@ -2051,10 +2053,13 @@ static struct pci_bus *__pci_scan_root_bus( pci_bus_insert_busn_res(b, b->number, 255); } - max = pci_scan_child_bus(b); - - if (!found) - pci_bus_update_busn_res_end(b, max); + if (host->ops && host->ops->phb_of_scan_bus) { + host->ops->phb_of_scan_bus(host); + } else { + max = pci_scan_child_bus(b); + if (!found) + pci_bus_update_busn_res_end(b, max); + } return b; } @@ -2064,7 +2069,7 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, u32 db, { struct pci_host_bridge *host; - host = pci_create_host_bridge(parent, db, resources, sysdata); + host = pci_create_host_bridge(parent, db, resources, sysdata, NULL); if (!host) return NULL; diff --git a/include/linux/pci.h b/include/linux/pci.h index 3ee8436..817756a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -401,6 +401,13 @@ struct pci_host_bridge_window { resource_size_t offset; /* bus address + offset = CPU address */ }; +struct pci_host_bridge; +struct pci_host_bridge_ops { + void (*phb_set_root_bus_speed)(struct pci_host_bridge *host); + int (*phb_prepare)(struct pci_host_bridge *host); + void (*phb_of_scan_bus)(struct pci_host_bridge *); +}; + struct pci_host_bridge { u16 domain; u16 busnum; @@ -408,6 +415,7 @@ struct pci_host_bridge { struct pci_bus *bus; /* root bus */ struct list_head list; struct list_head windows; /* pci_host_bridge_windows */ + struct pci_host_bridge_ops *ops; void (*release_fn)(struct pci_host_bridge *); void *release_data; }; @@ -419,8 +427,8 @@ void pci_set_host_bridge_release(struct pci_host_bridge *bridge, int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); struct pci_host_bridge *pci_create_host_bridge( - struct device *parent, u32 dombus, - struct list_head *resources, void *sysdata); + struct device *parent, u32 dombus, struct list_head *resources, + void *sysdata, struct pci_host_bridge_ops *ops); /* * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond * to P2P or CardBus bridge windows) go in a table. Additional ones (for