From patchwork Fri Sep 5 10:09:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 386231 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 80AC814010F for ; Fri, 5 Sep 2014 19:46:10 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756431AbaIEJqH (ORCPT ); Fri, 5 Sep 2014 05:46:07 -0400 Received: from szxga01-in.huawei.com ([119.145.14.64]:52463 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756706AbaIEJqA (ORCPT ); Fri, 5 Sep 2014 05:46:00 -0400 Received: from 172.24.2.119 (EHLO szxeml419-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CBG93443; Fri, 05 Sep 2014 17:45:49 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml419-hub.china.huawei.com (10.82.67.158) with Microsoft SMTP Server id 14.3.158.1; Fri, 5 Sep 2014 17:45:39 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Xinwei Hu , Wuyun , , , "Russell King" , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Yijing Wang Subject: [PATCH v1 08/21] x86/xen/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Fri, 5 Sep 2014 18:09:53 +0800 Message-ID: <1409911806-10519-9-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> References: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang CC: Konrad Rzeszutek Wilk Acked-by: David Vrabel --- arch/x86/pci/xen.c | 46 ++++++++++++++++++++++++++++++---------------- 1 files changed, 30 insertions(+), 16 deletions(-) diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 84c2fce..e669ee4 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -376,6 +376,11 @@ static void xen_initdom_restore_msi_irqs(struct pci_dev *dev) } #endif +static void xen_teardown_msi_irq(unsigned int irq) +{ + xen_destroy_irq(irq); +} + static void xen_teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *msidesc; @@ -385,19 +390,26 @@ static void xen_teardown_msi_irqs(struct pci_dev *dev) xen_pci_frontend_disable_msix(dev); else xen_pci_frontend_disable_msi(dev); - - /* Free the IRQ's and the msidesc using the generic code. */ - default_teardown_msi_irqs(dev); -} - -static void xen_teardown_msi_irq(unsigned int irq) -{ - xen_destroy_irq(irq); + + list_for_each_entry(msidesc, &dev->msi_list, list) { + int i, nvec; + if (msidesc->irq == 0) + continue; + if (msidesc->nvec_used) + nvec = msidesc->nvec_used; + else + nvec = 1 << msidesc->msi_attrib.multiple; + for (i = 0; i < nvec; i++) + xen_teardown_msi_irq(msidesc->irq + i); + } } void xen_nop_msi_mask(struct irq_data *data) { } + +struct msi_chip xen_msi_chip; + #endif int __init pci_xen_init(void) @@ -418,9 +430,9 @@ int __init pci_xen_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; + xen_msi_chip.setup_irqs = xen_setup_msi_irqs; + xen_msi_chip.teardown_irqs = xen_teardown_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif @@ -441,8 +453,9 @@ int __init pci_xen_hvm_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; + xen_msi_chip.setup_irqs = xen_hvm_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + x86_msi_chip = &xen_msi_chip; #endif return 0; } @@ -499,9 +512,10 @@ int __init pci_xen_initial_domain(void) int irq; #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; + xen_msi_chip.setup_irqs = xen_initdom_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + xen_msi_chip.restore_irqs = xen_initdom_restore_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif