From patchwork Fri Sep 5 10:09:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 386251 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 695B814010C for ; Fri, 5 Sep 2014 19:47:18 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756699AbaIEJq2 (ORCPT ); Fri, 5 Sep 2014 05:46:28 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:14686 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756782AbaIEJqK (ORCPT ); Fri, 5 Sep 2014 05:46:10 -0400 Received: from 172.24.2.119 (EHLO szxeml419-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BZB92844; Fri, 05 Sep 2014 17:45:59 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml419-hub.china.huawei.com (10.82.67.158) with Microsoft SMTP Server id 14.3.158.1; Fri, 5 Sep 2014 17:45:48 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Xinwei Hu , Wuyun , , , "Russell King" , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Yijing Wang Subject: [PATCH v1 13/21] MIPS/Xlp/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Fri, 5 Sep 2014 18:09:58 +0800 Message-ID: <1409911806-10519-14-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> References: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang --- arch/mips/pci/msi-xlp.c | 14 ++++++++++++-- 1 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c index e469dc7..6b791ef 100644 --- a/arch/mips/pci/msi-xlp.c +++ b/arch/mips/pci/msi-xlp.c @@ -245,7 +245,7 @@ static struct irq_chip xlp_msix_chip = { .irq_unmask = unmask_msi_irq, }; -void arch_teardown_msi_irq(unsigned int irq) +void xlp_teardown_msi_irq(unsigned int irq) { } @@ -450,7 +450,7 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link, return 0; } -int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) +static int xlp_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) { struct pci_dev *lnkdev; uint64_t lnkbase; @@ -472,6 +472,16 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) return xlp_setup_msi(lnkbase, node, link, desc); } +static struct msi_chip xlp_chip = { + .setup_irq = xlp_setup_msi_irq, + .teardown_irq = xlp_teardown_msi_irq, +}; + +struct msi_chip *arch_find_msi_chip(struct pci_dev *dev) +{ + return &xlp_chip; +} + void __init xlp_init_node_msi_irqs(int node, int link) { struct nlm_soc_info *nodep;