From patchwork Tue Jun 3 20:04:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Noever X-Patchwork-Id: 355636 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8672D14009F for ; Wed, 4 Jun 2014 06:06:55 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934232AbaFCUFN (ORCPT ); Tue, 3 Jun 2014 16:05:13 -0400 Received: from mail-wi0-f179.google.com ([209.85.212.179]:63667 "EHLO mail-wi0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934074AbaFCUFG (ORCPT ); Tue, 3 Jun 2014 16:05:06 -0400 Received: by mail-wi0-f179.google.com with SMTP id bs8so201945wib.6 for ; Tue, 03 Jun 2014 13:05:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zKFjBx3w4jdxIAF55UFO2if35WjEmpTeSZLHgocmsAY=; b=Mrlspxy4TOoLf682B1sypnEihY+cnxLeUpLb/ZwdnV5IEDH2Sb/kkAmnyaTChpI8OA 8yFWTsBZppP07RxRCWBSRVmR9lwuavMlpjSPO002LhJaXors6/SQTflqsGM/mZTMqE89 JjQ6EhvX50QaMVeQ9X3xVcPMO84B8ded3Mf+PvDn4f6PDCUT2F+A7nipNfESyLNbgLRS EaBJvAdQF0LKbtop5I3++00gMFo1UHIC/UmPXGaE9DUPNvxvMSORL8wIrhpqn6xqhP+T M0S85QQlxcBkuEEGCIHGCLDuKWn2ObUftenqcqP5d+UrMmz7a4vjbLkjgLj7K0AAvmaR fL8w== X-Received: by 10.180.81.134 with SMTP id a6mr36140624wiy.19.1401825904722; Tue, 03 Jun 2014 13:05:04 -0700 (PDT) Received: from localhost.localdomain (77-58-151-250.dclient.hispeed.ch. [77.58.151.250]) by mx.google.com with ESMTPSA id vm8sm615536wjc.27.2014.06.03.13.05.03 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 03 Jun 2014 13:05:04 -0700 (PDT) From: Andreas Noever To: linux-kernel@vger.kernel.org, Matthew Garrett , Greg KH , Bjorn Helgaas , linux-pci@vger.kernel.org Cc: Andreas Noever Subject: [PATCH v5 14/15] thunderbolt: Read switch uid from EEPROM Date: Tue, 3 Jun 2014 22:04:11 +0200 Message-Id: <1401825852-4745-15-git-send-email-andreas.noever@gmail.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1401825852-4745-1-git-send-email-andreas.noever@gmail.com> References: <1401825852-4745-1-git-send-email-andreas.noever@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add eeprom access code and read the uid during switch initialization. The UID will be used to check device identity after suspend. Signed-off-by: Andreas Noever --- drivers/thunderbolt/Makefile | 2 +- drivers/thunderbolt/eeprom.c | 189 +++++++++++++++++++++++++++++++++++++++++++ drivers/thunderbolt/switch.c | 5 ++ drivers/thunderbolt/tb.h | 3 + 4 files changed, 198 insertions(+), 1 deletion(-) create mode 100644 drivers/thunderbolt/eeprom.c diff --git a/drivers/thunderbolt/Makefile b/drivers/thunderbolt/Makefile index 0122ca6..5d1053c 100644 --- a/drivers/thunderbolt/Makefile +++ b/drivers/thunderbolt/Makefile @@ -1,3 +1,3 @@ obj-${CONFIG_THUNDERBOLT} := thunderbolt.o -thunderbolt-objs := nhi.o ctl.o tb.o switch.o cap.o path.o tunnel_pci.o +thunderbolt-objs := nhi.o ctl.o tb.o switch.o cap.o path.o tunnel_pci.o eeprom.o diff --git a/drivers/thunderbolt/eeprom.c b/drivers/thunderbolt/eeprom.c new file mode 100644 index 0000000..f28e402 --- /dev/null +++ b/drivers/thunderbolt/eeprom.c @@ -0,0 +1,189 @@ +/* + * Thunderbolt Cactus Ridge driver - eeprom access + * + * Copyright (c) 2014 Andreas Noever + */ + +#include "tb.h" + +/** + * tb_eeprom_ctl_write() - write control word + */ +static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl) +{ + return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); +} + +/** + * tb_eeprom_ctl_write() - read control word + */ +static int tb_eeprom_ctl_read(struct tb_switch *sw, struct tb_eeprom_ctl *ctl) +{ + return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); +} + +enum tb_eeprom_transfer { + TB_EEPROM_IN, + TB_EEPROM_OUT, +}; + +/** + * tb_eeprom_active - enable rom access + * + * WARNING: Always disable access after usage. Otherwise the controller will + * fail to reprobe. + */ +static int tb_eeprom_active(struct tb_switch *sw, bool enable) +{ + struct tb_eeprom_ctl ctl; + int res = tb_eeprom_ctl_read(sw, &ctl); + if (res) + return res; + if (enable) { + ctl.access_high = 1; + res = tb_eeprom_ctl_write(sw, &ctl); + if (res) + return res; + ctl.access_low = 0; + return tb_eeprom_ctl_write(sw, &ctl); + } else { + ctl.access_low = 1; + res = tb_eeprom_ctl_write(sw, &ctl); + if (res) + return res; + ctl.access_high = 0; + return tb_eeprom_ctl_write(sw, &ctl); + } +} + +/** + * tb_eeprom_transfer - transfer one bit + * + * If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->data_in. + * If TB_EEPROM_OUT is passed, then ctl->data_out will be written. + */ +static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl, + enum tb_eeprom_transfer direction) +{ + int res; + if (direction == TB_EEPROM_OUT) { + res = tb_eeprom_ctl_write(sw, ctl); + if (res) + return res; + } + ctl->clock = 1; + res = tb_eeprom_ctl_write(sw, ctl); + if (res) + return res; + if (direction == TB_EEPROM_IN) { + res = tb_eeprom_ctl_read(sw, ctl); + if (res) + return res; + } + ctl->clock = 0; + return tb_eeprom_ctl_write(sw, ctl); +} + +/** + * tb_eeprom_out - write one byte to the bus + */ +static int tb_eeprom_out(struct tb_switch *sw, u8 val) +{ + struct tb_eeprom_ctl ctl; + int i; + int res = tb_eeprom_ctl_read(sw, &ctl); + if (res) + return res; + for (i = 0; i < 8; i++) { + ctl.data_out = val & 0x80; + res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_OUT); + if (res) + return res; + val <<= 1; + } + return 0; +} + +/** + * tb_eeprom_in - read one byte from the bus + */ +static int tb_eeprom_in(struct tb_switch *sw, u8 *val) +{ + struct tb_eeprom_ctl ctl; + int i; + int res = tb_eeprom_ctl_read(sw, &ctl); + if (res) + return res; + *val = 0; + for (i = 0; i < 8; i++) { + *val <<= 1; + res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_IN); + if (res) + return res; + *val |= ctl.data_in; + } + return 0; +} + +/** + * tb_eeprom_read_n - read count bytes from offset into val + */ +static int tb_eeprom_read_n(struct tb_switch *sw, u16 offset, u8 *val, + size_t count) +{ + int i, res; + res = tb_eeprom_active(sw, true); + if (res) + return res; + res = tb_eeprom_out(sw, 3); + if (res) + return res; + res = tb_eeprom_out(sw, offset >> 8); + if (res) + return res; + res = tb_eeprom_out(sw, offset); + if (res) + return res; + for (i = 0; i < count; i++) { + res = tb_eeprom_in(sw, val + i); + if (res) + return res; + } + return tb_eeprom_active(sw, false); +} + +int tb_eeprom_read_uid(struct tb_switch *sw, u64 *uid) +{ + u8 data[9]; + struct tb_cap_plug_events cap; + int res; + if (!sw->cap_plug_events) { + tb_sw_warn(sw, "no TB_CAP_PLUG_EVENTS, cannot read eeprom\n"); + return -ENOSYS; + } + res = tb_sw_read(sw, &cap, TB_CFG_SWITCH, sw->cap_plug_events, + sizeof(cap) / 4); + if (res) + return res; + if (!cap.eeprom_ctl.present || cap.eeprom_ctl.not_present) { + tb_sw_warn(sw, "no NVM\n"); + return -ENOSYS; + } + + if (cap.drom_offset > 0xffff) { + tb_sw_warn(sw, "drom offset is larger than 0xffff: %#x\n", + cap.drom_offset); + return -ENXIO; + } + + /* read uid */ + res = tb_eeprom_read_n(sw, cap.drom_offset, data, 9); + if (res) + return res; + /* TODO: check checksum in data[0] */ + *uid = *(u64 *)(data+1); + return 0; +} + + + diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index 667413f..aeb5c30 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -376,6 +376,11 @@ struct tb_switch *tb_switch_alloc(struct tb *tb, u64 route) } sw->cap_plug_events = cap; + if (tb_eeprom_read_uid(sw, &sw->uid)) + tb_sw_warn(sw, "could not read uid from eeprom\n"); + else + tb_sw_info(sw, "uid: %#llx\n", sw->uid); + if (tb_plug_events_active(sw, true)) goto err; diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index 508abc4..a89087f 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -19,6 +19,7 @@ struct tb_switch { struct tb_regs_switch_header config; struct tb_port *ports; struct tb *tb; + u64 uid; int cap_plug_events; /* offset, zero if not found */ bool is_unplugged; /* unplugged, will go away */ }; @@ -231,6 +232,8 @@ int tb_path_activate(struct tb_path *path); void tb_path_deactivate(struct tb_path *path); bool tb_path_is_invalid(struct tb_path *path); +int tb_eeprom_read_uid(struct tb_switch *sw, u64 *uid); + static inline int tb_route_length(u64 route) {