From patchwork Tue May 6 13:34:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 346185 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 2BE8F1412E6 for ; Tue, 6 May 2014 23:36:45 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757811AbaEFNgn (ORCPT ); Tue, 6 May 2014 09:36:43 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:44302 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757725AbaEFNfv (ORCPT ); Tue, 6 May 2014 09:35:51 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s46DZMLV005821; Tue, 6 May 2014 08:35:22 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s46DZMdk032520; Tue, 6 May 2014 08:35:22 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Tue, 6 May 2014 08:35:22 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s46DYE8d031249; Tue, 6 May 2014 08:35:18 -0500 From: Kishon Vijay Abraham I To: , , , , , CC: , , Kishon Vijay Abraham I , Tony Lindgren , Bjorn Helgaas , Jingoo Han , Rob Herring Subject: [PATCH 14/17] ARM: dts: dra7: Add dt data for PCIe controller Date: Tue, 6 May 2014 19:04:00 +0530 Message-ID: <1399383244-14556-15-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399383244-14556-1-git-send-email-kishon@ti.com> References: <1399383244-14556-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Added dt data for PCIe controller. This node contains dt data for both the DRA7 part of designware controller and for the designware core. The documention for this node can be found @ ../bindings/pci/ti-pci.txt. Cc: Tony Lindgren Cc: Bjorn Helgaas Cc: Jingoo Han Cc: Rob Herring Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra7.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 653b5f6..20b1a09 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1011,6 +1011,28 @@ }; }; + pcie@51000000 { + compatible = "ti,dra7xx-pcie"; + reg = <0x51002000 0x14c>, <0x51000000 0x2000>; + reg-names = "ti_conf", "rc_dbics"; + interrupts = <0 232 0x4>, <0 233 0x4>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ti,device_type = <3>; + ranges = <0x00000800 0 0x20001000 0x20001000 0 0x00002000 + 0x81000000 0 0 0x20003000 0 0x00010000 + 0x82000000 0 0x20013000 0x20013000 0 0xffed000>; + #interrupt-cells = <1>; + base-mask = <0x00000000 0x0fffffff>; + num-lanes = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0x0 0 &gic 233>; + ti,hwmods = "pcie1"; + phys = <&pcie1_phy>; + phy-names = "pcie-phy"; + }; + sata: sata@4a141100 { compatible = "snps,dwc-ahci"; reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;