From patchwork Tue Jul 24 16:31:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 172954 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 404942C007F for ; Wed, 25 Jul 2012 02:39:39 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755464Ab2GXQdb (ORCPT ); Tue, 24 Jul 2012 12:33:31 -0400 Received: from mail-gh0-f174.google.com ([209.85.160.174]:54145 "EHLO mail-gh0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755324Ab2GXQd3 (ORCPT ); Tue, 24 Jul 2012 12:33:29 -0400 Received: by ghrr11 with SMTP id r11so6850818ghr.19 for ; Tue, 24 Jul 2012 09:33:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=WMjp/Z8qViaSsCzO2GuG8OXGhsL0uYslwMBAugBP6JI=; b=hR9xSrdtaJxRN4XeuuWrZS7URYRDkNsuzmdqyecw1y64ucTB9LTcaXHbdMrx20lojt tHzyVc4Q4yQRjTEfbrOoFotttWCk3uh9VxZI+1KBED/x5KJTrnzfSs0OV00QxMxnkxw2 OxIKmuAgt3fZOHsZlA5cm7iA1zPyS0rsBSMB/YOCrBxTT4N9CPSPqXweIyMQYhKRNekJ Ef+Vkr5xztygWdepFt/GXRRsRHnFVTL9nu0Z1wezxqHB2dYWZLyyLvca2fQE/w0fbp3q aAfYfPIL1txd2XyLthdhUNNYe0Rzm6ttqCIQFFXf6ZRdbLFUAPbDsvFhEMaZCAXknbOP vpjA== Received: by 10.68.203.98 with SMTP id kp2mr45671926pbc.132.1343147608893; Tue, 24 Jul 2012 09:33:28 -0700 (PDT) Received: from localhost.localdomain ([221.221.26.244]) by mx.google.com with ESMTPS id wi6sm12457583pbc.35.2012.07.24.09.33.20 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jul 2012 09:33:28 -0700 (PDT) From: Jiang Liu To: Bjorn Helgaas , Don Dutile Cc: Yijing Wang , Yinghai Lu , Taku Izumi , "Rafael J . Wysocki" , Kenji Kaneshige , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Jiang Liu Subject: [RFC PATCH v2 01/32] PCI: add pcie_flags_reg into struct pci_dev to cache PCIe capabilities register Date: Wed, 25 Jul 2012 00:31:13 +0800 Message-Id: <1343147504-25891-2-git-send-email-jiang.liu@huawei.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1343147504-25891-1-git-send-email-jiang.liu@huawei.com> References: <1343147504-25891-1-git-send-email-jiang.liu@huawei.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Yijing Wang From: Yijing Wang Since PCI Express Capabilities Register is read only, cache its value into struct pci_dev to avoid repeatedly calling pci_read_config_*(). Signed-off-by: Yijing Wang Signed-off-by: Jiang Liu --- drivers/pci/probe.c | 1 + include/linux/pci.h | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 6c143b4..6fd58df 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -929,6 +929,7 @@ void set_pcie_port_type(struct pci_dev *pdev) pdev->is_pcie = 1; pdev->pcie_cap = pos; pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, ®16); + pdev->pcie_flags_reg = reg16; pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4; pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, ®16); pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD; diff --git a/include/linux/pci.h b/include/linux/pci.h index 5faa831..95662b2 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -258,6 +258,7 @@ struct pci_dev { u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */ u8 rom_base_reg; /* which config register controls the ROM */ u8 pin; /* which interrupt pin this device uses */ + u16 pcie_flags_reg; /* cached PCI-E Capabilities Register */ struct pci_driver *driver; /* which driver has allocated this device */ u64 dma_mask; /* Mask of the bits of bus address this @@ -1650,6 +1651,15 @@ static inline bool pci_is_pcie(struct pci_dev *dev) return !!pci_pcie_cap(dev); } +/** + * pci_pcie_type - get the PCIe device/port type + * @dev: PCI device + */ +static inline int pci_pcie_type(const struct pci_dev *dev) +{ + return (dev->pcie_flags_reg & PCI_EXP_FLAGS_TYPE) >> 4; +} + void pci_request_acs(void); bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); bool pci_acs_path_enabled(struct pci_dev *start,