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[0/2] PCI, AER, CXL: Fix appropriate _OSC check for CXL RAS Cap

Message ID 20230719192313.38591-1-Smita.KoralahalliChannabasappa@amd.com
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Series PCI, AER, CXL: Fix appropriate _OSC check for CXL RAS Cap | expand

Message

Smita Koralahalli July 19, 2023, 7:23 p.m. UTC 
This series of patches fixes the appropriate _OSC check for CXL RAS
registers.

First patch moves around pcie_aer_is_native() function declaration to a
common location to be used by cxl/pci module.

Second patch addresses the _OSC check.

Smita Koralahalli (2):
  PCI, AER: Export and make pcie_aer_is_native() global
  cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS
    registers

 drivers/cxl/pci.c          | 7 +++----
 drivers/pci/pcie/aer.c     | 1 +
 drivers/pci/pcie/portdrv.h | 2 --
 include/linux/aer.h        | 2 ++
 4 files changed, 6 insertions(+), 6 deletions(-)