| Message ID | 20220412193839.2545814-1-dmitry.baryshkov@linaro.org |
|---|---|
| Headers | show |
| Series | PCI: qcom: rework pipe_clk/pipe_clk_src handling | expand |
[ Dropping tdas@codeaurora.org, which bounces. ] On Tue, Apr 12, 2022 at 10:38:34PM +0300, Dmitry Baryshkov wrote: > PCIe pipe clk (and some other clocks) must be parked to the "safe" > source (bi_tcxo) when corresponding GDSC is turned off and on again. > Currently this is handcoded in the PCIe driver by reparenting the > gcc_pipe_N_clk_src clock. > > Instead of doing it manually, follow the approach used by > clk_rcg2_shared_ops and implement this parking in the enable() and > disable() clock operations for respective pipe clocks. > > PCIe part depends on [1]. Looks like you forgot to add the link to the prerequisite patch: [1] https://lore.kernel.org/all/20220401133351.10113-1-johan+linaro@kernel.org/ > Changes since v1: > - Rebased on top of [1]. > - Removed erroneous Fixes tag from the patch 4. > > Changes since RFC: > - Rework clk-regmap-mux fields. Specify safe parent as P_* value rather > than specifying the register value directly > - Expand commit message to the first patch to specially mention that > it is required only on newer generations of Qualcomm chipsets. Johan
On 13/04/2022 12:20, Johan Hovold wrote: > [ Dropping tdas@codeaurora.org, which bounces. ] > > On Tue, Apr 12, 2022 at 10:38:34PM +0300, Dmitry Baryshkov wrote: >> PCIe pipe clk (and some other clocks) must be parked to the "safe" >> source (bi_tcxo) when corresponding GDSC is turned off and on again. >> Currently this is handcoded in the PCIe driver by reparenting the >> gcc_pipe_N_clk_src clock. >> >> Instead of doing it manually, follow the approach used by >> clk_rcg2_shared_ops and implement this parking in the enable() and >> disable() clock operations for respective pipe clocks. >> >> PCIe part depends on [1]. > > Looks like you forgot to add the link to the prerequisite patch: > > [1] https://lore.kernel.org/all/20220401133351.10113-1-johan+linaro@kernel.org/ yes, thank you for the correction > >> Changes since v1: >> - Rebased on top of [1]. >> - Removed erroneous Fixes tag from the patch 4. >> >> Changes since RFC: >> - Rework clk-regmap-mux fields. Specify safe parent as P_* value rather >> than specifying the register value directly >> - Expand commit message to the first patch to specially mention that >> it is required only on newer generations of Qualcomm chipsets. > > Johan
PCIe pipe clk (and some other clocks) must be parked to the "safe" source (bi_tcxo) when corresponding GDSC is turned off and on again. Currently this is handcoded in the PCIe driver by reparenting the gcc_pipe_N_clk_src clock. Instead of doing it manually, follow the approach used by clk_rcg2_shared_ops and implement this parking in the enable() and disable() clock operations for respective pipe clocks. PCIe part depends on [1]. Changes since v1: - Rebased on top of [1]. - Removed erroneous Fixes tag from the patch 4. Changes since RFC: - Rework clk-regmap-mux fields. Specify safe parent as P_* value rather than specifying the register value directly - Expand commit message to the first patch to specially mention that it is required only on newer generations of Qualcomm chipsets. Dmitry Baryshkov (5): clk: qcom: regmap-mux: add pipe clk implementation clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks PCI: qcom: Remove unnecessary pipe_clk handling PCI: qcom: Drop manual pipe_clk_src handling drivers/clk/qcom/clk-regmap-mux.c | 78 +++++++++++++++++++++++++ drivers/clk/qcom/clk-regmap-mux.h | 3 + drivers/clk/qcom/gcc-sc7280.c | 6 +- drivers/clk/qcom/gcc-sm8450.c | 6 +- drivers/pci/controller/dwc/pcie-qcom.c | 81 +------------------------- 5 files changed, 92 insertions(+), 82 deletions(-) base-commit: 3123109284176b1532874591f7c81f3837bbdc17 prerequisite-patch-id: 71e4b5b7ff5d87f2407735cc6a3074812cde3697