From patchwork Fri Feb 9 12:04:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raghavendra, Vignesh" X-Patchwork-Id: 871355 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="YXmfqBAg"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zdDJQ6Bzgz9s72 for ; Fri, 9 Feb 2018 23:04:38 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751371AbeBIMET (ORCPT ); Fri, 9 Feb 2018 07:04:19 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:43020 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750970AbeBIMEB (ORCPT ); Fri, 9 Feb 2018 07:04:01 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w19C3fPo006590; Fri, 9 Feb 2018 06:03:41 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518177821; bh=wOeWpigNzGpwy8UrgTCll4RidpETniNgheqW+nKfaxQ=; h=From:To:CC:Subject:Date; b=YXmfqBAgE/tEQf8iQGeeMiXaxV8XhiHV3saJArwgARcVaycK+nWwtt3G5R6gj1zXp aoc6jANjJ/IQ1u17d3Iiv02lucwKANKTlul1A26VsB6dZzrsQQAxRDDSKrwQFReXOH AvpYMMKoQfaJAHhNgJPseqvIX4a92EclmAVAfQ6Y= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19C3fV5022902; Fri, 9 Feb 2018 06:03:41 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 9 Feb 2018 06:03:40 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 9 Feb 2018 06:03:40 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19C3bko017802; Fri, 9 Feb 2018 06:03:38 -0600 From: Vignesh R To: Lorenzo Pieralisi , Jingoo Han , Joao Pinto CC: Kishon Vijay Abraham I , Bjorn Helgaas , Niklas Cassel , , , , Vignesh R Subject: [PATCH 0/3] dra7xx: PCIe IRQ handling rework Date: Fri, 9 Feb 2018 17:34:12 +0530 Message-ID: <20180209120415.17590-1-vigneshr@ti.com> X-Mailer: git-send-email 2.16.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This series re-works dra7xx MSI IRQ handler to avoid issues of missing of MSI IRQs and Legacy IRQs. Tested on AM572 EVM with TUSB PCIe USB card and Intel PCIe WiFi cards. Vignesh R (3): Revert "PCI: dwc: Clear MSI interrupt status after it is handled, not before" PCI: dwc: pci-dra7xx: Improve MSI IRQ handling PCI: dwc: pci-dra7xx: Handle legacy and MSI IRQs together drivers/pci/dwc/pci-dra7xx.c | 32 +++++++++++++++++++++----------- drivers/pci/dwc/pcie-designware-host.c | 2 +- 2 files changed, 22 insertions(+), 12 deletions(-)