From patchwork Fri Dec 1 06:13:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 843365 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="QIwH31pV"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yp3qZ6cHhz9t3x for ; Fri, 1 Dec 2017 17:13:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752428AbdLAGNZ (ORCPT ); Fri, 1 Dec 2017 01:13:25 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:56458 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751193AbdLAGNY (ORCPT ); Fri, 1 Dec 2017 01:13:24 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id vB16CoHG000574; Fri, 1 Dec 2017 00:12:50 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1512108770; bh=MgHdap4yCHOCSKAulaLC176yCC1k0dTjdICj+dU8NV8=; h=From:To:CC:Subject:Date; b=QIwH31pVIfzUQSm62K+lG8aycqyAc8x4zicUbGXtcTUm3Vk/gTDnlQ9d8NP/q5A7C /Cfn02g4bL5hw2fvyQt/ynOLVtHAeY7fHhLoLezuIfTJLV4g4OjmbgnkKpQVKvZll2 /xEYLf0UiDuKbiDIMrGlOQmk1O5j1UCeI4OCzCks= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB16CodY030274; Fri, 1 Dec 2017 00:12:50 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Fri, 1 Dec 2017 00:12:49 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Fri, 1 Dec 2017 00:12:49 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB16CjTa013757; Fri, 1 Dec 2017 00:12:46 -0600 From: Vignesh R To: Bjorn Helgaas , Rob Herring , Tony Lindgren , Chris Welch CC: Kishon Vijay Abraham I , Lorenzo Pieralisi , , , , , , Vignesh R Subject: [PATCH 0/4] pci-dra7xx: Fix legacy IRQ handling and errata handling Date: Fri, 1 Dec 2017 11:43:07 +0530 Message-ID: <20171201061311.16691-1-vigneshr@ti.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This series contains two fixes: 1. Make workaround for errata i870 applicable in Host mode as well(previously it was enabled only for EP mode) as per errata documentation: http://www.ti.com/lit/er/sprz429k/sprz429k.pdf 2. Fix problem with handling of legacy INTD interrupts. Tested on 66AK2G EVM and ICE boards Vignesh R (4): pci: dwc: pci-dra7xx: Enable errata i870 for both EP and RC mode dt-bindings: PCI: dra7xx: Add bindings for unaligned access in host mode ARM: dts: dra7: Add DT property to allow unaligned mem access to PCIe RC PCI: dwc: pci-dra7xx: Fix legacy IRQ handling Documentation/devicetree/bindings/pci/ti-pci.txt | 5 +++++ arch/arm/boot/dts/dra7.dtsi | 2 ++ drivers/pci/dwc/pci-dra7xx.c | 23 ++++++++++++++--------- 3 files changed, 21 insertions(+), 9 deletions(-)