From patchwork Fri May 15 09:58:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 1290979 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=socionext.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49NkQd0HHtz9sTr for ; Fri, 15 May 2020 19:59:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728144AbgEOJ7T (ORCPT ); Fri, 15 May 2020 05:59:19 -0400 Received: from mx.socionext.com ([202.248.49.38]:29835 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728032AbgEOJ7T (ORCPT ); Fri, 15 May 2020 05:59:19 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 15 May 2020 18:59:17 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 9C924180B60; Fri, 15 May 2020 18:59:17 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 15 May 2020 18:59:17 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id D1E971A12D0; Fri, 15 May 2020 18:59:16 +0900 (JST) From: Kunihiko Hayashi To: Bjorn Helgaas , Lorenzo Pieralisi , Jingoo Han , Gustavo Pimentel , Rob Herring , Masahiro Yamada Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH v2 0/5] PCI: uniphier: Add features for UniPhier PCIe host controller Date: Fri, 15 May 2020 18:58:58 +0900 Message-Id: <1589536743-6684-1-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This series adds some features for UniPhier PCIe host controller. - Add support for PME and AER invoked by MSI interrupt - Add iATU register view support for PCIe version >= 4.80 - Add an error message when failing to get phy driver This adds a new function called by MSI handler in DesignWare PCIe framework, that invokes PME and AER funcions to detect the factor from SoC-dependent registers. Changes since v1: - Add check if struct resource is NULL - Fix warning in the type of dev_err() argument Kunihiko Hayashi (5): PCI: dwc: Add msi_host_isr() callback PCI: uniphier: Add misc interrupt handler to invoke PME and AER dt-bindings: PCI: uniphier: Add iATU register description PCI: uniphier: Add iATU register support PCI: uniphier: Add error message when failed to get phy .../devicetree/bindings/pci/uniphier-pcie.txt | 1 + drivers/pci/controller/dwc/pcie-designware-host.c | 8 +-- drivers/pci/controller/dwc/pcie-designware.h | 1 + drivers/pci/controller/dwc/pcie-uniphier.c | 67 +++++++++++++++++----- 4 files changed, 60 insertions(+), 17 deletions(-)