From patchwork Thu May 6 09:12:08 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 51815 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0B597B7D30 for ; Thu, 6 May 2010 19:13:59 +1000 (EST) Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1O9x8C-0008IZ-Qd; Thu, 06 May 2010 09:12:32 +0000 Received: from mail-pw0-f49.google.com ([209.85.160.49]) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1O9x7p-0007Ra-8v; Thu, 06 May 2010 09:12:10 +0000 Received: by mail-pw0-f49.google.com with SMTP id 3so2674728pwj.36 for ; Thu, 06 May 2010 02:12:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:date:message-id :subject:from:to:content-type; bh=aqcK328EKUpXMvx3hyR37qYJR+DgAT4SFiDtDqvC4AI=; b=qh23lVuHmGIL8KJFEfOz4Pz/s7wVr0wqaZ53Sm6Em7Bigfpeo7NQe+5fIdXk+xVmGZ zs3pjIBZyJR2UkOXrNZzMeNm1w82n9J82Pge5PFQFqjE3tUfCAmzezSGfIP4UEpkOe4L i9Y9DARe7YL+BpU7tQwESX99SspDXK4vOPSFU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; b=VJTJAGUB/nbW8JrOmlxagpZ8G7H7MGjIb+Bzu533uJC2VbHdPp1Snmh1LI6jOyK/P6 SxVHTGEiNDx4bbmxqCvecsGl6+IVpF+G0YQnvYpBCFV1UMEfKsxlCoThY7J2OPavaRgp QOUV8NK977rnpWt+gEMyIb0ZnH79kyul+IP7k= MIME-Version: 1.0 Received: by 10.143.26.20 with SMTP id d20mr12043333wfj.31.1273137128873; Thu, 06 May 2010 02:12:08 -0700 (PDT) Received: by 10.142.252.16 with HTTP; Thu, 6 May 2010 02:12:08 -0700 (PDT) Date: Thu, 6 May 2010 05:12:08 -0400 Message-ID: Subject: [PATCH 16/20] pxa3xx_nand: fix reset timeout on mmp2 From: Haojian Zhuang To: Eric Miao , linux-arm-kernel , David Woodhouse , linux-mtd@lists.infradead.org X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20100506_051209_551631_84A84075 X-CRM114-Status: GOOD ( 15.09 ) X-Spam-Score: -0.1 (/) X-Spam-Report: SpamAssassin version 3.3.1 on bombadil.infradead.org summary: Content analysis details: (-0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is freemail (haojian.zhuang[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From 9e68ac30228bd5841b8fed7a56739d401240916b Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Mon, 29 Mar 2010 17:35:45 +0800 Subject: [PATCH] pxa3xx_nand: fix reset timeout on mmp2 For mmp2 board, reset command would always have timeout when enable the IRQ processing. The command done would comes after exit the IRQ processing whatever the timeout value is set. Change reset command use polling mode fix the issue. Signed-off-by: Lei Wen Signed-off-by: Haojian Zhuang --- drivers/mtd/nand/pxa3xx_nand.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) | cmd; @@ -1123,7 +1127,7 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command, { struct pxa3xx_nand_info *info = mtd->priv; struct pxa3xx_nand *nand = info->nand_data; - int ret, exec_cmd; + int ret, exec_cmd, polling_mode; /* if this is a x16 device ,then convert the input * "byte" address into a "word" address appropriate @@ -1140,6 +1144,7 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command, } DBG_NAND(printk("command %x, page %x\n", command, page_addr)); + polling_mode = use_polling; exec_cmd = prepare_command_pool(nand, command, column, page_addr); if (exec_cmd) { init_completion(&nand->cmd_complete); @@ -1160,6 +1165,7 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command, disable_int(nand, NDCR_INT_MASK); nand->state &= ~STATE_CMD_PREPARED; } + use_polling = polling_mode; } static uint8_t pxa3xx_nand_read_byte(struct mtd_info *mtd) diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 31ebc78..2eebd20 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -1099,6 +1099,10 @@ static int prepare_command_pool(struct pxa3xx_nand *nand, int command, break; case NAND_CMD_RESET: + /* on some platform, it is stranger that when issue reset command, + * cmd done would not come till timeout cause irq exit. + * Force polling mode for reset command*/ + use_polling = 1; cmd = cmdset.reset; info->ndcb0[0] |= NDCB0_CMD_TYPE(5)