Message ID | b62c8661eb3c2d72e61511794a3ab1b43f005805.1476951078.git-series.maxime.ripard@free-electrons.com |
---|---|
State | Not Applicable |
Headers | show |
On Thu, Oct 20, 2016 at 4:12 PM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > The GR8 has access to the UART3 controller, which was missing in the > DTSI. Add it. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
On Thu, Oct 20, 2016 at 10:06:47PM +0800, Chen-Yu Tsai wrote: > On Thu, Oct 20, 2016 at 4:12 PM, Maxime Ripard > <maxime.ripard@free-electrons.com> wrote: > > The GR8 has access to the UART3 controller, which was missing in the > > DTSI. Add it. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > Acked-by: Chen-Yu Tsai <wens@csie.org> Applied. Maxime
diff --git a/arch/arm/boot/dts/ntc-gr8.dtsi b/arch/arm/boot/dts/ntc-gr8.dtsi index ca54e03ef366..d7cf6be2549c 100644 --- a/arch/arm/boot/dts/ntc-gr8.dtsi +++ b/arch/arm/boot/dts/ntc-gr8.dtsi @@ -978,6 +978,16 @@ status = "disabled"; }; + uart3: serial@01c28c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28c00 0x400>; + interrupts = <4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 19>; + status = "disabled"; + }; + i2c0: i2c@01c2ac00 { compatible = "allwinner,sun4i-a10-i2c"; reg = <0x01c2ac00 0x400>;
The GR8 has access to the UART3 controller, which was missing in the DTSI. Add it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm/boot/dts/ntc-gr8.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+), 0 deletions(-)