| Message ID | 9f654612-54a5-41d1-01dc-8196f334bffd@cogentembedded.com |
|---|---|
| State | Accepted |
| Delegated to: | Ambarus Tudor |
| Headers | show |
| Series | [v2] mtd: spi-nor: move #define SPINOR_OP_WRDI | expand |
On Tuesday, April 7, 2020 11:56:43 PM EEST Sergei Shtylyov wrote: > The write disable (WRDI) opcode is not really specific to the SST flashes > (anymore?) -- move the #define to the main opcode group, just before WREN. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > --- > This patch is atop of the 'spi-nor/next' branch of the MTD 'linux.git' repo > plus 5 kernel-doc fixes posted last week... > > Changes in version 2: > - Fixed up the patch description to match the code. > > include/linux/mtd/spi-nor.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Applied, thanks.
Index: linux/include/linux/mtd/spi-nor.h =================================================================== --- linux.orig/include/linux/mtd/spi-nor.h +++ linux/include/linux/mtd/spi-nor.h @@ -20,6 +20,7 @@ */ /* Flash opcodes. */ +#define SPINOR_OP_WRDI 0x04 /* Write disable */ #define SPINOR_OP_WREN 0x06 /* Write enable */ #define SPINOR_OP_RDSR 0x05 /* Read status register */ #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ @@ -80,7 +81,6 @@ /* Used for SST flashes only. */ #define SPINOR_OP_BP 0x02 /* Byte program */ -#define SPINOR_OP_WRDI 0x04 /* Write disable */ #define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */ /* Used for S3AN flashes only */
The write disable (WRDI) opcode is not really specific to the SST flashes (anymore?) -- move the #define to the main opcode group, just before WREN. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- This patch is atop of the 'spi-nor/next' branch of the MTD 'linux.git' repo plus 5 kernel-doc fixes posted last week... Changes in version 2: - Fixed up the patch description to match the code. include/linux/mtd/spi-nor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)