From patchwork Tue Oct 9 10:44:44 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Kumar X-Patchwork-Id: 190267 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EE3732C00D6 for ; Tue, 9 Oct 2012 21:46:56 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TLXKP-0005VJ-RK; Tue, 09 Oct 2012 10:46:22 +0000 Received: from eu1sys200aog113.obsmtp.com ([207.126.144.135]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1TLXJN-0005EJ-1p; Tue, 09 Oct 2012 10:45:19 +0000 Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob113.postini.com ([207.126.147.11]) with SMTP ID DSNKUHQAN0alYjUw2i4JYhuKLbfMqfwQQxWe@postini.com; Tue, 09 Oct 2012 10:45:16 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id C72A7C0; Tue, 9 Oct 2012 10:36:53 +0000 (GMT) Received: from Webmail-ap.st.com (eapex1hubcas3.st.com [10.80.176.67]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 6D651CE6; Tue, 9 Oct 2012 10:45:07 +0000 (GMT) Received: from localhost (10.199.82.151) by Webmail-ap.st.com (10.80.176.7) with Microsoft SMTP Server (TLS) id 8.3.245.1; Tue, 9 Oct 2012 18:45:07 +0800 From: Vipin Kumar To: , Subject: [PATCH 02/11] fsmc/nand: Rearrange the fsmc_nand_data structure and update comments Date: Tue, 9 Oct 2012 16:14:44 +0530 Message-ID: <2aa2a9c00bcfa62605edfab8fb4c29448612ced3.1349778820.git.vipin.kumar@st.com> X-Mailer: git-send-email 1.7.10.rc2.10.gb47606 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.126.144.135 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Vipin Kumar , linus.walleij@linaro.org, spear-devel@list.st.com, plagnioj@jcrosoft.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Signed-off-by: Vipin Kumar Reviewed-by: Viresh Kumar --- drivers/mtd/nand/fsmc_nand.c | 51 ++++++++++++++++++++++++++------------------ 1 file changed, 30 insertions(+), 21 deletions(-) diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index e96d7d1..bd89580 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -278,52 +278,61 @@ static struct fsmc_eccplace fsmc_ecc4_sp_place = { * struct fsmc_nand_data - structure for FSMC NAND device state * * @pid: Part ID on the AMBA PrimeCell format - * @mtd: MTD info for a NAND flash. - * @nand: Chip related info for a NAND flash. - * @partitions: Partition info for a NAND Flash. - * @nr_partitions: Total number of partition of a NAND flash. - * - * @ecc_place: ECC placing locations in oobfree type format. - * @bank: Bank number for probed device. - * @clk: Clock structure for FSMC. + * @mtd: MTD info for a NAND flash + * @nand: Chip related info for a NAND flash + * @dev: Device structure pointer + * @clk: Clock structure for FSMC + * @ecc_place: ECC placing locations in oobfree type format + * @bank: Bank number for probed device * * @read_dma_chan: DMA channel for read access * @write_dma_chan: DMA channel for write access to NAND * @dma_access_complete: Completion structure * - * @data_pa: NAND Physical port for Data. - * @data_va: NAND port for Data. - * @cmd_va: NAND port for Command. - * @addr_va: NAND port for Address. - * @regs_va: FSMC regs base address. + * @dev_timings: Timings to be programmed in controller + * @partitions: Partition info for a NAND Flash + * @nr_partitions: Total number of partition of a NAND flash + * @mode: Defines the NAND device access mode + * Can be one of: + * - DMA access + * - Word access (CPU) + * - None (Use driver default ie bus width specific + * CPU access) + * @select_chip: Select a particular bank + * + * @data_pa: NAND Physical port for Data + * @data_va: NAND port for Data + * @cmd_va: NAND port for Command + * @addr_va: NAND port for Address + * @regs_va: FSMC regs base address */ struct fsmc_nand_data { u32 pid; struct mtd_info mtd; struct nand_chip nand; - struct mtd_partition *partitions; - unsigned int nr_partitions; - - struct fsmc_eccplace *ecc_place; - unsigned int bank; struct device *dev; - enum access_mode mode; struct clk *clk; + struct fsmc_eccplace *ecc_place; + unsigned int bank; /* DMA related objects */ struct dma_chan *read_dma_chan; struct dma_chan *write_dma_chan; struct completion dma_access_complete; + /* Recieved from plat data */ struct fsmc_nand_timings *dev_timings; + struct mtd_partition *partitions; + unsigned int nr_partitions; + enum access_mode mode; + void (*select_chip)(uint32_t bank, uint32_t busw); + /* Virtual/Physical addresses for CPU/DMA access */ dma_addr_t data_pa; void __iomem *data_va; void __iomem *cmd_va; void __iomem *addr_va; void __iomem *regs_va; - - void (*select_chip)(uint32_t bank, uint32_t busw); }; /* Assert CS signal based on chipnr */