From patchwork Tue Aug 4 17:52:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aaron Sierra X-Patchwork-Id: 503735 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id DF742140285 for ; Wed, 5 Aug 2015 03:57:07 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZMgQx-0001Xa-3Q; Tue, 04 Aug 2015 17:55:27 +0000 Received: from xes-mad.com ([216.165.139.218]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZMgQu-0000Jd-4s; Tue, 04 Aug 2015 17:55:24 +0000 Received: from zimbra.xes-mad.com (zimbra.xes-mad.com [10.52.0.127]) by xes-mad.com (8.13.8/8.13.8) with ESMTP id t74HqtUW005022; Tue, 4 Aug 2015 12:52:55 -0500 Date: Tue, 4 Aug 2015 12:52:54 -0500 (CDT) From: Aaron Sierra To: Brian Norris , David Woodhouse , Ezequiel Garcia Message-ID: <288216793.189179.1438710774869.JavaMail.zimbra@xes-inc.com> In-Reply-To: <447095612.147126.1421278909058.JavaMail.zimbra@xes-inc.com> Subject: [PATCH] mtd: fsl_upm: Enable software BCH ECC support MIME-Version: 1.0 X-Originating-IP: [10.52.16.65] X-Mailer: Zimbra 8.0.6_GA_5922 (ZimbraWebClient - FF39 (Linux)/8.0.6_GA_5922) Thread-Topic: fsl_upm: Enable software BCH ECC support Thread-Index: ZBzbXYKhuG11Bsd+1LqclUM+wJ51Rw== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150804_105524_353870_706DCF1A X-CRM114-Status: UNSURE ( 8.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-mtd@lists.infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org This patch preserves the default software ECC mode while adding the ability to use BCH ECC (as required for larger NAND devices). The BCH-required strength and step size values are pulled from the device-tree by nand_scan_ident(), so we replace nand_scan() with explicit calls to nand_scan_ident() and nand_scan_tail() in order to sanity check ECC properties from the device-tree. Tested-by: Ryan Schaefer Signed-off-by: Jordan Friendshuh Signed-off-by: Aaron Sierra --- .../devicetree/bindings/mtd/fsl-upm-nand.txt | 32 ++++++++++++++++++++ drivers/mtd/nand/fsl_upm.c | 35 +++++++++++++++++++++- 2 files changed, 66 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/fsl-upm-nand.txt b/Documentation/devicetree/bindings/mtd/fsl-upm-nand.txt index fce4894..3643ee1 100644 --- a/Documentation/devicetree/bindings/mtd/fsl-upm-nand.txt +++ b/Documentation/devicetree/bindings/mtd/fsl-upm-nand.txt @@ -18,6 +18,9 @@ Optional properties: - chip-delay : chip dependent delay for transferring data from array to read registers (tR). Required if property "gpios" is not used (R/B# pins not connected). +- nand-ecc-mode : as defined by nand.txt ("soft" and "soft_bch", only). +- nand-ecc-strength : as defined by nand.txt. +- nand-ecc-step-size : as defined by nand.txt. Each flash chip described may optionally contain additional sub-nodes describing partitions of the address space. See partition.txt for more @@ -65,3 +68,32 @@ upm@3,0 { }; }; }; + +/* + * Micron MT29F32G08AFABA (M62B) + * 32 Gb (4 GiB), 2 chipselect + */ +upm@2,0 { + #address-cells = <0>; + #size-cells = <0>; + compatible = "fsl,upm-nand"; + reg = <2 0x0 0x80000>; + fsl,upm-addr-line-cs-offsets = <0x0 0x10000>; + fsl,upm-addr-offset = <0x10>; + fsl,upm-cmd-offset = <0x08>; + fsl,upm-wait-flags = <0x1>; + chip-delay = <50>; + + nand@0 { + #address-cells = <1>; + #size-cells = <2>; + nand-ecc-mode = "soft_bch"; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partition@0 { + label = "NAND filesystem"; + reg = <0x0 0x1 0x00000000>; + }; + }; +}; diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 72755d7..0982d7a 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -182,6 +182,7 @@ static int fun_chip_init(struct fsl_upm_nand *fun, if (!flash_np) return -ENODEV; + fun->chip.dn = flash_np; fun->mtd.name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start, flash_np->name); if (!fun->mtd.name) { @@ -189,7 +190,39 @@ static int fun_chip_init(struct fsl_upm_nand *fun, goto err; } - ret = nand_scan(&fun->mtd, fun->mchip_count); + ret = nand_scan_ident(&fun->mtd, fun->mchip_count, NULL); + if (ret) + goto err; + + switch (fun->chip.ecc.mode) { + case NAND_ECC_NONE: + fun->chip.ecc.mode = NAND_ECC_SOFT; + break; + case NAND_ECC_SOFT: + if (fun->chip.ecc.strength && fun->chip.ecc.strength != 1) + dev_warn(fun->dev, "Ignoring %d-bit software ECC\n", + fun->chip.ecc.strength); + if (fun->chip.ecc.size && + (fun->chip.ecc.size != 256) && + (fun->chip.ecc.size != 512)) { + dev_err(fun->dev, "Invalid software ECC step: %d\n", + fun->chip.ecc.size); + goto err; + } + break; + case NAND_ECC_SOFT_BCH: + if (fun->chip.ecc.strength < 2) { + dev_err(fun->dev, "Invalid BCH ECC strength: %d\n", + fun->chip.ecc.strength); + goto err; + } + break; + default: + dev_err(fun->dev, "ECC mode unsupported"); + goto err; + } + + ret = nand_scan_tail(&fun->mtd); if (ret) goto err;