diff mbox series

mtd: nand: raw: atmel: Fix comment in timings preparation

Message ID 20240226122537.75097-1-ada@thorsis.com
State Accepted
Headers show
Series mtd: nand: raw: atmel: Fix comment in timings preparation | expand

Commit Message

Alexander Dahl Feb. 26, 2024, 12:25 p.m. UTC
Looks like a copy'n'paste mistake introduced when initially adding the
dynamic timings feature with commit f9ce2eddf176 ("mtd: nand: atmel: Add
->setup_data_interface() hooks").  The context around this and
especially the code itself suggests 'read' is meant instead of write.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
---
 drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


base-commit: d206a76d7d2726f3b096037f2079ce0bd3ba329b

Comments

Nicolas Ferre Feb. 26, 2024, 12:54 p.m. UTC | #1
On 26/02/2024 at 13:25, Alexander Dahl wrote:
> Looks like a copy'n'paste mistake introduced when initially adding the
> dynamic timings feature with commit f9ce2eddf176 ("mtd: nand: atmel: Add
> ->setup_data_interface() hooks").  The context around this and
> especially the code itself suggests 'read' is meant instead of write.
> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>

Looks indeed valid:
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>

Thanks Alexander. Best regards,
   Nicolas

> ---
>   drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
> index 4cb478bbee4a..dc75d50d52e8 100644
> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c
> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
> @@ -1370,23 +1370,23 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
>           *
>           * NRD_PULSE = tRP
>           */
>          ncycles = DIV_ROUND_UP(conf->timings.sdr.tRP_min, mckperiodps);
>          totalcycles += ncycles;
>          ret = atmel_smc_cs_conf_set_pulse(smcconf, ATMEL_SMC_NRD_SHIFT,
>                                            ncycles);
>          if (ret)
>                  return ret;
> 
>          /*
> -        * The write cycle timing is directly matching tWC, but is also
> +        * The read cycle timing is directly matching tRC, but is also
>           * dependent on the setup and hold timings we calculated earlier,
>           * which gives:
>           *
>           * NRD_CYCLE = max(tRC, NRD_PULSE + NRD_HOLD)
>           *
>           * NRD_SETUP is always 0.
>           */
>          ncycles = DIV_ROUND_UP(conf->timings.sdr.tRC_min, mckperiodps);
>          ncycles = max(totalcycles, ncycles);
>          ret = atmel_smc_cs_conf_set_cycle(smcconf, ATMEL_SMC_NRD_SHIFT,
>                                            ncycles);
> 
> base-commit: d206a76d7d2726f3b096037f2079ce0bd3ba329b
> --
> 2.39.2
>
Miquel Raynal March 7, 2024, 5:28 p.m. UTC | #2
On Mon, 2024-02-26 at 12:25:37 UTC, Alexander Dahl wrote:
> Looks like a copy'n'paste mistake introduced when initially adding the
> dynamic timings feature with commit f9ce2eddf176 ("mtd: nand: atmel: Add
> ->setup_data_interface() hooks").  The context around this and
> especially the code itself suggests 'read' is meant instead of write.
> 
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.

Miquel
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 4cb478bbee4a..dc75d50d52e8 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1370,23 +1370,23 @@  static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
 	 *
 	 * NRD_PULSE = tRP
 	 */
 	ncycles = DIV_ROUND_UP(conf->timings.sdr.tRP_min, mckperiodps);
 	totalcycles += ncycles;
 	ret = atmel_smc_cs_conf_set_pulse(smcconf, ATMEL_SMC_NRD_SHIFT,
 					  ncycles);
 	if (ret)
 		return ret;
 
 	/*
-	 * The write cycle timing is directly matching tWC, but is also
+	 * The read cycle timing is directly matching tRC, but is also
 	 * dependent on the setup and hold timings we calculated earlier,
 	 * which gives:
 	 *
 	 * NRD_CYCLE = max(tRC, NRD_PULSE + NRD_HOLD)
 	 *
 	 * NRD_SETUP is always 0.
 	 */
 	ncycles = DIV_ROUND_UP(conf->timings.sdr.tRC_min, mckperiodps);
 	ncycles = max(totalcycles, ncycles);
 	ret = atmel_smc_cs_conf_set_cycle(smcconf, ATMEL_SMC_NRD_SHIFT,
 					  ncycles);