diff mbox series

[v3,3/3] mtd: spi-nor: Add support for IS25LX256 operating in 1S-8S-8S octal read mode

Message ID 20221201212750.267721-4-nathan.morrison@timesys.com
State Superseded
Delegated to: Michael Walle
Headers show
Series mtd: spi-nor: Extend SFDP to support additional octal modes as per latest JEDEC standard | expand

Commit Message

Nathan Barrett-Morrison Dec. 1, 2022, 9:27 p.m. UTC
This adds the IS25LX256 chip into the ISSI flash_info parts table

Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
---
 drivers/mtd/spi-nor/issi.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Michael Walle Dec. 1, 2022, 10:12 p.m. UTC | #1
Am 2022-12-01 22:27, schrieb Nathan Barrett-Morrison:
> This adds the IS25LX256 chip into the ISSI flash_info parts table
> 
> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
> ---
>  drivers/mtd/spi-nor/issi.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
> index 89a66a19d754..98cc5e1d9c18 100644
> --- a/drivers/mtd/spi-nor/issi.c
> +++ b/drivers/mtd/spi-nor/issi.c
> @@ -74,6 +74,9 @@ static const struct flash_info issi_nor_parts[] = {
>  		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
>  		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
>  		.fixups = &is25lp256_fixups },
> +	{ "is25lx256", INFO(0x9d5a19, 0, 128 * 1024, 256)

Please use INFO(0x9d5a19, 0, 0, 0)

> +		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_4B_OPCODES |
> +			      SPI_NOR_OCTAL_READ_1_8_8) },

Neither of these flags should be needed. As mentioned before,
you'd need a fixups for the missing 1-1-8 and 1-8-8 fast read ops.

-michael
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 89a66a19d754..98cc5e1d9c18 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -74,6 +74,9 @@  static const struct flash_info issi_nor_parts[] = {
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
 		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
 		.fixups = &is25lp256_fixups },
+	{ "is25lx256", INFO(0x9d5a19, 0, 128 * 1024, 256)
+		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_4B_OPCODES |
+			      SPI_NOR_OCTAL_READ_1_8_8) },
 
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2)