| Message ID | 20220210023334.408926-2-tudor.ambarus@microchip.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Ambarus Tudor |
| Headers | show |
| Series | mtd: spi-nor: Rework Octal DTR enable methods | expand |
On 2/10/2022 11:33 AM, Tudor Ambarus wrote: > There are manufacturers that use registers indexed by address. Some of > them support "read/write any register" opcodes. Provide core methods that > can be used by all manufacturers. SPI NOR controller ops are intentionally > not supported as we intend to move all the SPI NOR controller drivers > under the SPI subsystem. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mtd/spi-nor/core.c | 41 ++++++++++++++++++++++++++++++++++++++ > drivers/mtd/spi-nor/core.h | 4 ++++ > 2 files changed, 45 insertions(+) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index 7d5e3acb0ae7..d394179689e6 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -307,6 +307,47 @@ ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, > return nor->controller_ops->write(nor, to, len, buf); > } > > +/** > + * spi_nor_read_reg() - read register to flash memory > + * @nor: pointer to 'struct spi_nor'. > + * @op: SPI memory operation. op->data.buf must be DMA-able. > + * @proto: SPI protocol to use for the register operation. > + * > + * Return: zero on success, -errno otherwise > + */ > +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto) > +{ > + if (!nor->spimem) > + return -EOPNOTSUPP; > + > + spi_nor_spimem_setup_op(nor, op, proto); > + return spi_nor_spimem_exec_op(nor, op); > +} > + > +/** > + * spi_nor_write_reg() - write register to flash memory > + * @nor: pointer to 'struct spi_nor' > + * @op: SPI memory operation. op->data.buf must be DMA-able. > + * @proto: SPI protocol to use for the register operation. > + * > + * Return: zero on success, -errno otherwise > + */ > +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto) > +{ > + int ret; > + > + if (!nor->spimem) > + return -EOPNOTSUPP; > + > + ret = spi_nor_write_enable(nor); > + if (ret) > + return ret; > + spi_nor_spimem_setup_op(nor, op, proto); > + return spi_nor_spimem_exec_op(nor, op); > +} > + > /** > * spi_nor_write_enable() - Set write enable latch with Write Enable command. > * @nor: pointer to 'struct spi_nor'. > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index cbfb4fa7647f..c728454b5424 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -578,6 +578,10 @@ ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, > u8 *buf); > ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, > const u8 *buf); > +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto); > +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto); > int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); > > int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); Thank you for introducing these helpers. I revised my S25HL/HS-T series on top of this and confirmed that is working correctly. Tested-By: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Best Regards, Takahiro
On 10/02/22 04:33AM, Tudor Ambarus wrote: > There are manufacturers that use registers indexed by address. Some of > them support "read/write any register" opcodes. Provide core methods that > can be used by all manufacturers. SPI NOR controller ops are intentionally > not supported as we intend to move all the SPI NOR controller drivers > under the SPI subsystem. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mtd/spi-nor/core.c | 41 ++++++++++++++++++++++++++++++++++++++ > drivers/mtd/spi-nor/core.h | 4 ++++ > 2 files changed, 45 insertions(+) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index 7d5e3acb0ae7..d394179689e6 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -307,6 +307,47 @@ ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, > return nor->controller_ops->write(nor, to, len, buf); > } > > +/** > + * spi_nor_read_reg() - read register to flash memory Nitpick: s/to/from/ ? > + * @nor: pointer to 'struct spi_nor'. > + * @op: SPI memory operation. op->data.buf must be DMA-able. > + * @proto: SPI protocol to use for the register operation. > + * > + * Return: zero on success, -errno otherwise > + */ > +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto) > +{ > + if (!nor->spimem) > + return -EOPNOTSUPP; > + > + spi_nor_spimem_setup_op(nor, op, proto); > + return spi_nor_spimem_exec_op(nor, op); > +} > + > +/** > + * spi_nor_write_reg() - write register to flash memory > + * @nor: pointer to 'struct spi_nor' > + * @op: SPI memory operation. op->data.buf must be DMA-able. > + * @proto: SPI protocol to use for the register operation. > + * > + * Return: zero on success, -errno otherwise > + */ > +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto) > +{ > + int ret; > + > + if (!nor->spimem) > + return -EOPNOTSUPP; > + > + ret = spi_nor_write_enable(nor); > + if (ret) > + return ret; Nitpick: Add a blank line here. > + spi_nor_spimem_setup_op(nor, op, proto); > + return spi_nor_spimem_exec_op(nor, op); > +} > + > /** > * spi_nor_write_enable() - Set write enable latch with Write Enable command. > * @nor: pointer to 'struct spi_nor'. > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index cbfb4fa7647f..c728454b5424 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -578,6 +578,10 @@ ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, > u8 *buf); > ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, > const u8 *buf); > +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto); > +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, > + enum spi_nor_protocol proto); > int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); > > int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 7d5e3acb0ae7..d394179689e6 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -307,6 +307,47 @@ ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, return nor->controller_ops->write(nor, to, len, buf); } +/** + * spi_nor_read_reg() - read register to flash memory + * @nor: pointer to 'struct spi_nor'. + * @op: SPI memory operation. op->data.buf must be DMA-able. + * @proto: SPI protocol to use for the register operation. + * + * Return: zero on success, -errno otherwise + */ +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, + enum spi_nor_protocol proto) +{ + if (!nor->spimem) + return -EOPNOTSUPP; + + spi_nor_spimem_setup_op(nor, op, proto); + return spi_nor_spimem_exec_op(nor, op); +} + +/** + * spi_nor_write_reg() - write register to flash memory + * @nor: pointer to 'struct spi_nor' + * @op: SPI memory operation. op->data.buf must be DMA-able. + * @proto: SPI protocol to use for the register operation. + * + * Return: zero on success, -errno otherwise + */ +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, + enum spi_nor_protocol proto) +{ + int ret; + + if (!nor->spimem) + return -EOPNOTSUPP; + + ret = spi_nor_write_enable(nor); + if (ret) + return ret; + spi_nor_spimem_setup_op(nor, op, proto); + return spi_nor_spimem_exec_op(nor, op); +} + /** * spi_nor_write_enable() - Set write enable latch with Write Enable command. * @nor: pointer to 'struct spi_nor'. diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index cbfb4fa7647f..c728454b5424 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -578,6 +578,10 @@ ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, u8 *buf); ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, const u8 *buf); +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op, + enum spi_nor_protocol proto); +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op, + enum spi_nor_protocol proto); int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
There are manufacturers that use registers indexed by address. Some of them support "read/write any register" opcodes. Provide core methods that can be used by all manufacturers. SPI NOR controller ops are intentionally not supported as we intend to move all the SPI NOR controller drivers under the SPI subsystem. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/core.c | 41 ++++++++++++++++++++++++++++++++++++++ drivers/mtd/spi-nor/core.h | 4 ++++ 2 files changed, 45 insertions(+)