| Message ID | 20201126202614.5710-4-michael@walle.cc |
|---|---|
| State | Changes Requested |
| Delegated to: | Ambarus Tudor |
| Headers | show |
| Series | mtd: spi-nor: keep lock bits if they are non-volatile | expand |
On 11/26/20 10:26 PM, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > For the Atmel and SST parts this flag was already moved to individual > flash parts because it is considered bad esp. because newer flash chips > will automatically inherit the "has locking" support. While this won't > likely be the case for the Intel parts, we do it for consistency > reasons. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > changes since v5 > - new patch > > drivers/mtd/spi-nor/intel.c | 16 +++------------- > 1 file changed, 3 insertions(+), 13 deletions(-) > > diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c > index d8196f101368..6c31bef3fc60 100644 > --- a/drivers/mtd/spi-nor/intel.c > +++ b/drivers/mtd/spi-nor/intel.c > @@ -10,23 +10,13 @@ > > static const struct flash_info intel_parts[] = { > /* Intel/Numonyx -- xxxs33b */ > - { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, > - { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, > - { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, > -}; > - > -static void intel_default_init(struct spi_nor *nor) > -{ > - nor->flags |= SNOR_F_HAS_LOCK; > -} > - > -static const struct spi_nor_fixups intel_fixups = { > - .default_init = intel_default_init, > + { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, SPI_NOR_HAS_LOCK) }, > + { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, SPI_NOR_HAS_LOCK) }, > + { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, SPI_NOR_HAS_LOCK) }, > }; > > const struct spi_nor_manufacturer spi_nor_intel = { > .name = "intel", > .parts = intel_parts, > .nparts = ARRAY_SIZE(intel_parts), > - .fixups = &intel_fixups, > }; > -- > 2.20.1 >
diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c index d8196f101368..6c31bef3fc60 100644 --- a/drivers/mtd/spi-nor/intel.c +++ b/drivers/mtd/spi-nor/intel.c @@ -10,23 +10,13 @@ static const struct flash_info intel_parts[] = { /* Intel/Numonyx -- xxxs33b */ - { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, - { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, - { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, -}; - -static void intel_default_init(struct spi_nor *nor) -{ - nor->flags |= SNOR_F_HAS_LOCK; -} - -static const struct spi_nor_fixups intel_fixups = { - .default_init = intel_default_init, + { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, SPI_NOR_HAS_LOCK) }, + { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, SPI_NOR_HAS_LOCK) }, + { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, SPI_NOR_HAS_LOCK) }, }; const struct spi_nor_manufacturer spi_nor_intel = { .name = "intel", .parts = intel_parts, .nparts = ARRAY_SIZE(intel_parts), - .fixups = &intel_fixups, };
For the Atmel and SST parts this flag was already moved to individual flash parts because it is considered bad esp. because newer flash chips will automatically inherit the "has locking" support. While this won't likely be the case for the Intel parts, we do it for consistency reasons. Signed-off-by: Michael Walle <michael@walle.cc> --- changes since v5 - new patch drivers/mtd/spi-nor/intel.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-)