diff mbox series

[RESEND,v2] mtd: spi-nor: Fix address width on flash chips > 16MB

Message ID 20201006132346.12652-1-bert@biot.com
State Accepted
Delegated to: Vignesh R
Headers show
Series [RESEND,v2] mtd: spi-nor: Fix address width on flash chips > 16MB | expand

Commit Message

Bert Vermeulen Oct. 6, 2020, 1:23 p.m. UTC
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.

Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
Signed-off-by: Bert Vermeulen <bert@biot.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/core.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

Pratyush Yadav Oct. 6, 2020, 3:18 p.m. UTC | #1
On 06/10/20 03:23PM, Bert Vermeulen wrote:
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
> 
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
> 
> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>
> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  drivers/mtd/spi-nor/core.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>  		/* already configured from SFDP */
>  	} else if (nor->info->addr_width) {
>  		nor->addr_width = nor->info->addr_width;
> -	} else if (nor->mtd.size > 0x1000000) {
> -		/* enable 4-byte addressing if the device exceeds 16MiB */
> -		nor->addr_width = 4;
>  	} else {
>  		nor->addr_width = 3;
>  	}
>  
> +	if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
Nitpick:    ^^^^^^^^^^^^^^^^^^^^^^^^ you can drop this part. But its 
fine either way.

Reviewed-by: Pratyush Yadav <p.yadav@ti.com>

> +		/* enable 4-byte addressing if the device exceeds 16MiB */
> +		nor->addr_width = 4;
> +	}
> +
>  	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>  		dev_dbg(nor->dev, "address width is too large: %u\n",
>  			nor->addr_width);
Greg KH Oct. 6, 2020, 3:33 p.m. UTC | #2
On Tue, Oct 06, 2020 at 03:23:46PM +0200, Bert Vermeulen wrote:
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
> 
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
> 
> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>
> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  drivers/mtd/spi-nor/core.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)

<formletter>

This is not the correct way to submit patches for inclusion in the
stable kernel tree.  Please read:
    https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.

</formletter>
Raghavendra, Vignesh Oct. 7, 2020, 7:29 a.m. UTC | #3
On 10/6/20 8:48 PM, Pratyush Yadav wrote:
> On 06/10/20 03:23PM, Bert Vermeulen wrote:
>> If a flash chip has more than 16MB capacity but its BFPT reports
>> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>>
>> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
>> did get set. This fixes that check.
>>
>> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
>> Signed-off-by: Bert Vermeulen <bert@biot.com>
>> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
>> ---
>>  drivers/mtd/spi-nor/core.c | 8 +++++---
>>  1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0369d98b2d12..a2c35ad9645c 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>>  		/* already configured from SFDP */
>>  	} else if (nor->info->addr_width) {
>>  		nor->addr_width = nor->info->addr_width;
>> -	} else if (nor->mtd.size > 0x1000000) {
>> -		/* enable 4-byte addressing if the device exceeds 16MiB */
>> -		nor->addr_width = 4;
>>  	} else {
>>  		nor->addr_width = 3;
>>  	}
>>  
>> +	if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> Nitpick:    ^^^^^^^^^^^^^^^^^^^^^^^^ you can drop this part. But its 
> fine either way.
> 

I don't think its a good idea to drop nor->addr_width == 3 check as
nor->info->addr_width is permitted to have a value > 4 (although there
is no such flash today)...

> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
> 
>> +		/* enable 4-byte addressing if the device exceeds 16MiB */
>> +		nor->addr_width = 4;
>> +	}
>> +
>>  	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>>  		dev_dbg(nor->dev, "address width is too large: %u\n",
>>  			nor->addr_width);
> 

Regards
Vignesh
Pratyush Yadav Oct. 7, 2020, 7:48 a.m. UTC | #4
On 07/10/20 12:59PM, Vignesh Raghavendra wrote:
> 
> 
> On 10/6/20 8:48 PM, Pratyush Yadav wrote:
> > On 06/10/20 03:23PM, Bert Vermeulen wrote:
> >> If a flash chip has more than 16MB capacity but its BFPT reports
> >> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
> >>
> >> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> >> did get set. This fixes that check.
> >>
> >> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> >> Signed-off-by: Bert Vermeulen <bert@biot.com>
> >> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> >> ---
> >>  drivers/mtd/spi-nor/core.c | 8 +++++---
> >>  1 file changed, 5 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> >> index 0369d98b2d12..a2c35ad9645c 100644
> >> --- a/drivers/mtd/spi-nor/core.c
> >> +++ b/drivers/mtd/spi-nor/core.c
> >> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> >>  		/* already configured from SFDP */
> >>  	} else if (nor->info->addr_width) {
> >>  		nor->addr_width = nor->info->addr_width;
> >> -	} else if (nor->mtd.size > 0x1000000) {
> >> -		/* enable 4-byte addressing if the device exceeds 16MiB */
> >> -		nor->addr_width = 4;
> >>  	} else {
> >>  		nor->addr_width = 3;
> >>  	}
> >>  
> >> +	if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> > Nitpick:    ^^^^^^^^^^^^^^^^^^^^^^^^ you can drop this part. But its 
> > fine either way.
> > 
> 
> I don't think its a good idea to drop nor->addr_width == 3 check as
> nor->info->addr_width is permitted to have a value > 4 (although there
> is no such flash today)...

The check below for SPI_NOR_MAX_ADDR_WIDTH will return an error when 
nor->addr_width > 4, but I see your point.
 
> > Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
> > 
> >> +		/* enable 4-byte addressing if the device exceeds 16MiB */
> >> +		nor->addr_width = 4;
> >> +	}
> >> +
> >>  	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> >>  		dev_dbg(nor->dev, "address width is too large: %u\n",
> >>  			nor->addr_width);
> > 
> 
> Regards
> Vignesh
Raghavendra, Vignesh Oct. 29, 2020, 4:46 a.m. UTC | #5
On Tue, 6 Oct 2020 15:23:46 +0200, Bert Vermeulen wrote:
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
> 
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/fixes, thanks!
[1/1] mtd: spi-nor: Fix address width on flash chips > 16MB
      https://git.kernel.org/mtd/c/324f78dfb4

--
Regards
Vignesh
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0369d98b2d12..a2c35ad9645c 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3009,13 +3009,15 @@  static int spi_nor_set_addr_width(struct spi_nor *nor)
 		/* already configured from SFDP */
 	} else if (nor->info->addr_width) {
 		nor->addr_width = nor->info->addr_width;
-	} else if (nor->mtd.size > 0x1000000) {
-		/* enable 4-byte addressing if the device exceeds 16MiB */
-		nor->addr_width = 4;
 	} else {
 		nor->addr_width = 3;
 	}
 
+	if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+		/* enable 4-byte addressing if the device exceeds 16MiB */
+		nor->addr_width = 4;
+	}
+
 	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
 		dev_dbg(nor->dev, "address width is too large: %u\n",
 			nor->addr_width);