| Message ID | 20200423162113.38055-2-vadivel.muruganx.ramuthevar@linux.intel.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Miquel Raynal |
| Headers | show |
| Series | mtd: rawnand: Add NAND controller support on Intel LGM SoC | expand |
Hi, On Fri, Apr 24, 2020 at 12:21:12AM +0800, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > > Add YAML file for dt-bindings to support NAND Flash Controller > on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > --- > .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 61 ++++++++++++++++++++++ > 1 file changed, 61 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > > diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > new file mode 100644 > index 000000000000..6dd899d367b4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > @@ -0,0 +1,61 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel LGM SoC NAND Controller Device Tree Bindings > + > +allOf: > + - $ref: "nand-controller.yaml" > + > +maintainers: > + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > + > +properties: > + compatible: > + const: intel,lgm-nand-controller > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + dmas: > + maxItems: 2 > + > + dma-names: > + enum: > + - rx > + - tx This looks wrong? If you have two dmas channels, I assume you'll want to have both rx and tx, right? If so, then you need an items, not an enum. > + pinctrl-names: true > + > +patternProperties: > + "^pinctrl-[0-9]+$": true both pinctrl-names and that pattern are added automatically by the tooling, you should leave them out. > + "^nand@[a-f0-9]+$": > + type: object > + properties: > + reg: > + minimum: 0 > + maximum: 7 > + > + nand-ecc-mode: true > + > + nand-ecc-algo: > + const: hw > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - dmas > + > +additionalProperties: false > + > +... Can you provide an example too? Thanks! Maxime
diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml new file mode 100644 index 000000000000..6dd899d367b4 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel LGM SoC NAND Controller Device Tree Bindings + +allOf: + - $ref: "nand-controller.yaml" + +maintainers: + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> + +properties: + compatible: + const: intel,lgm-nand-controller + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + dmas: + maxItems: 2 + + dma-names: + enum: + - rx + - tx + + pinctrl-names: true + +patternProperties: + "^pinctrl-[0-9]+$": true + + "^nand@[a-f0-9]+$": + type: object + properties: + reg: + minimum: 0 + maximum: 7 + + nand-ecc-mode: true + + nand-ecc-algo: + const: hw + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - dmas + +additionalProperties: false + +...