diff mbox series

mtd: spi-nor: Make spansion_set_4byte_addr_mode() private

Message ID 20200420174443.221527-1-tudor.ambarus@microchip.com
State Changes Requested
Delegated to: Ambarus Tudor
Headers show
Series mtd: spi-nor: Make spansion_set_4byte_addr_mode() private | expand

Commit Message

Tudor Ambarus April 20, 2020, 5:44 p.m. UTC 
From: Tudor Ambarus <tudor.ambarus@microchip.com>

spansion_set_4byte_addr_mode() is used just by the spansion flashes,
make the method private.

Here is how the set_4byte_addr_mode() method is treated in SPI NOR:
- atmel, catalist, everspin, fujitsu, intel, sst, xilinx are too small
  for a set_4byte_addr_method.
- eon, gidadevice, issi, macronix, xmc use EN4B/EX4B.
- micron-st uses st_micron_set_4byte_addr_mode()
- winbond uses winbond_set_4byte_addr_mode().
- newer spansion have a 4BAM opcode (support not added). Older spansion
  flashes use the BRWR command (spansion_set_4byte_addr_mode())

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/core.c     | 35 ----------------------------
 drivers/mtd/spi-nor/spansion.c | 42 ++++++++++++++++++++++++++++++++++
 include/linux/mtd/spi-nor.h    |  1 -
 3 files changed, 42 insertions(+), 36 deletions(-)

Comments

Tudor Ambarus April 20, 2020, 5:55 p.m. UTC | #1 
On Monday, April 20, 2020 8:44:47 PM EEST Tudor Ambarus - M18064 wrote:
> spansion_set_4byte_addr_mode() is used just by the spansion flashes,
> make the method private.

The subject should be reworded to "mtd: spi-nor: Move 
spansion_set_4byte_addr_mode() in spansion.c", because as of now this function 
is already private, but in the core.
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index cc68ea84318e..148cbf134bb9 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -397,40 +397,6 @@  int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
 	return ret;
 }
 
-/**
- * spansion_set_4byte_addr_mode() - Set 4-byte address mode for Spansion
- * flashes.
- * @nor:	pointer to 'struct spi_nor'.
- * @enable:	true to enter the 4-byte address mode, false to exit the 4-byte
- *		address mode.
- *
- * Return: 0 on success, -errno otherwise.
- */
-static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
-{
-	int ret;
-
-	nor->bouncebuf[0] = enable << 7;
-
-	if (nor->spimem) {
-		struct spi_mem_op op =
-			SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 1),
-				   SPI_MEM_OP_NO_ADDR,
-				   SPI_MEM_OP_NO_DUMMY,
-				   SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1));
-
-		ret = spi_mem_exec_op(nor->spimem, &op);
-	} else {
-		ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,
-						     nor->bouncebuf, 1);
-	}
-
-	if (ret)
-		dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
-
-	return ret;
-}
-
 /**
  * spi_nor_write_ear() - Write Extended Address Register.
  * @nor:	pointer to 'struct spi_nor'.
@@ -2724,7 +2690,6 @@  static void spi_nor_info_init_params(struct spi_nor *nor)
 
 	/* Initialize legacy flash parameters and settings. */
 	params->quad_enable = spi_nor_sr2_bit1_quad_enable;
-	params->set_4byte_addr_mode = spansion_set_4byte_addr_mode;
 	params->setup = spi_nor_default_setup;
 	/* Default to 16-bit Write Status (01h) Command */
 	nor->flags |= SNOR_F_HAS_16BIT_SR;
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index 88183eba8ac1..b95d00fb422b 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -8,6 +8,8 @@ 
 
 #include "core.h"
 
+#define SPINOR_OP_BRWR		0x17	/* Bank register write */
+
 static const struct flash_info spansion_parts[] = {
 	/* Spansion/Cypress -- single (large) sector size only, at least
 	 * for the chips listed here (without boot sectors).
@@ -74,6 +76,45 @@  static const struct flash_info spansion_parts[] = {
 			     SPI_NOR_4B_OPCODES) },
 };
 
+/**
+ * spansion_set_4byte_addr_mode() - Set 4-byte address mode for Spansion
+ * flashes.
+ * @nor:	pointer to 'struct spi_nor'.
+ * @enable:	true to enter the 4-byte address mode, false to exit the 4-byte
+ *		address mode.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
+{
+	int ret;
+
+	nor->bouncebuf[0] = enable << 7;
+
+	if (nor->spimem) {
+		struct spi_mem_op op =
+			SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 1),
+				   SPI_MEM_OP_NO_ADDR,
+				   SPI_MEM_OP_NO_DUMMY,
+				   SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1));
+
+		ret = spi_mem_exec_op(nor->spimem, &op);
+	} else {
+		ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,
+						     nor->bouncebuf, 1);
+	}
+
+	if (ret)
+		dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
+
+	return ret;
+}
+
+static void spansion_default_init(struct spi_nor *nor)
+{
+	nor->params->set_4byte_addr_mode = spansion_set_4byte_addr_mode;
+}
+
 static void spansion_post_sfdp_fixups(struct spi_nor *nor)
 {
 	if (nor->params->size <= SZ_16M)
@@ -86,6 +127,7 @@  static void spansion_post_sfdp_fixups(struct spi_nor *nor)
 }
 
 static const struct spi_nor_fixups spansion_fixups = {
+	.default_init = spansion_default_init,
 	.post_sfdp = spansion_post_sfdp_fixups,
 };
 
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 1cc8ed5d59ed..7373ba6fbb42 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -97,7 +97,6 @@ 
 #define SPINOR_OP_EX4B		0xe9	/* Exit 4-byte mode */
 
 /* Used for Spansion flashes only. */
-#define SPINOR_OP_BRWR		0x17	/* Bank register write */
 #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
 
 /* Used for Micron flashes only. */