diff mbox series

mtd: spi-nor: add support for GigaDevice GD25D05

Message ID 20200106124624.28779-1-koen.vandeputte@ncentric.com
State Changes Requested
Delegated to: Ambarus Tudor
Headers show
Series mtd: spi-nor: add support for GigaDevice GD25D05 | expand

Commit Message

Koen Vandeputte Jan. 6, 2020, 12:46 p.m. UTC
Tested on a MikroTik RB912UAG-5HPnD r2

[    0.641714] m25p80 spi0.0: found gd25d05, expected m25p80
[    0.649916] m25p80 spi0.0: gd25d05 (64 Kbytes)
[    0.655122] Creating 4 MTD partitions on "spi0.0":
[    0.660164] 0x000000000000-0x00000000c000 : "routerboot"
[    0.667782] 0x00000000c000-0x00000000d000 : "hard_config"
[    0.675073] 0x00000000d000-0x00000000e000 : "bios"
[    0.682613] 0x00000000e000-0x00000000f000 : "soft_config"

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Tudor Ambarus Jan. 11, 2020, 3:52 p.m. UTC | #1
Hi, Koen,

On Monday, January 6, 2020 2:46:24 PM EET Koen Vandeputte wrote:
> Tested on a MikroTik RB912UAG-5HPnD r2
> 
> [    0.641714] m25p80 spi0.0: found gd25d05, expected m25p80
> [    0.649916] m25p80 spi0.0: gd25d05 (64 Kbytes)
> [    0.655122] Creating 4 MTD partitions on "spi0.0":
> [    0.660164] 0x000000000000-0x00000000c000 : "routerboot"
> [    0.667782] 0x00000000c000-0x00000000d000 : "hard_config"
> [    0.675073] 0x00000000d000-0x00000000e000 : "bios"
> [    0.682613] 0x00000000e000-0x00000000f000 : "soft_config"

I'm afraid that this is not enough. You'll have to test all the flags that you 
advertised. Typically one should do a read, erase, write, read-back test, and 
then to exercise the lock and unlock features. If you want to be exhaustive, 
you can force the controller to do the reads in single, dual or quad modes, 
but if you choose to test just the best supported read mode, it is fine too. 
Please specify in the commit message what you tested.

Cheers,
ta
> 
> Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
> Cc: Miquel Raynal <miquel.raynal@bootlin.com>
> Cc: Richard Weinberger <richard@nod.at>
> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
> Cc: Vignesh Raghavendra <vigneshr@ti.com>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index f4afe123e9dc..a34fa42d47a2 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -2346,6 +2346,11 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) 
},
> 
>  	/* GigaDevice */
> +	{
> +		"gd25d05", INFO(0xc84010, 0, 64 * 1024,  1,
> +			SECT_4K | SPI_NOR_DUAL_READ | 
SPI_NOR_QUAD_READ |
> +			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> +	},
>  	{
>  		"gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
>  			SECT_4K | SPI_NOR_DUAL_READ | 
SPI_NOR_QUAD_READ |
Koen Vandeputte Jan. 14, 2020, 9:13 a.m. UTC | #2
On 11.01.20 16:52, Tudor.Ambarus@microchip.com wrote:
> Hi, Koen,
>
> On Monday, January 6, 2020 2:46:24 PM EET Koen Vandeputte wrote:
>> Tested on a MikroTik RB912UAG-5HPnD r2
>>
>> [    0.641714] m25p80 spi0.0: found gd25d05, expected m25p80
>> [    0.649916] m25p80 spi0.0: gd25d05 (64 Kbytes)
>> [    0.655122] Creating 4 MTD partitions on "spi0.0":
>> [    0.660164] 0x000000000000-0x00000000c000 : "routerboot"
>> [    0.667782] 0x00000000c000-0x00000000d000 : "hard_config"
>> [    0.675073] 0x00000000d000-0x00000000e000 : "bios"
>> [    0.682613] 0x00000000e000-0x00000000f000 : "soft_config"
> I'm afraid that this is not enough. You'll have to test all the flags that you
> advertised. Typically one should do a read, erase, write, read-back test, and
> then to exercise the lock and unlock features. If you want to be exhaustive,
> you can force the controller to do the reads in single, dual or quad modes,
> but if you choose to test just the best supported read mode, it is fine too.
> Please specify in the commit message what you tested.
>
> Cheers,
> ta
Hi Tudor,

Thanks for the guidance here as it's my first patch towards this part of 
the kernel.

I've not only went through the datasheet of this device, but also the 
datasheet from another very similar GD chip carrying the same specs
All features as indicated by the flags are clearly described in both 
datasheets. (like, Single, Dual, Quad modes)

The only delta is the amount of advertised blocks, and some other chip 
package details out-of-scope from electrical performance.

Is this clarification enough to send a V2 with a modified commit msg?

Please advice,
Thanks again,

Koen
>> Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
>> Cc: Miquel Raynal <miquel.raynal@bootlin.com>
>> Cc: Richard Weinberger <richard@nod.at>
>> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
>> Cc: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>>   drivers/mtd/spi-nor/spi-nor.c | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index f4afe123e9dc..a34fa42d47a2 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -2346,6 +2346,11 @@ static const struct flash_info spi_nor_ids[] = {
>>   	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE)
> },
>>   	/* GigaDevice */
>> +	{
>> +		"gd25d05", INFO(0xc84010, 0, 64 * 1024,  1,
>> +			SECT_4K | SPI_NOR_DUAL_READ |
> SPI_NOR_QUAD_READ |
>> +			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
>> +	},
>>   	{
>>   		"gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
>>   			SECT_4K | SPI_NOR_DUAL_READ |
> SPI_NOR_QUAD_READ |
>
>
>
Koen Vandeputte Feb. 4, 2020, 2:10 p.m. UTC | #3
On 14.01.20 10:13, Koen Vandeputte wrote:
>
> On 11.01.20 16:52, Tudor.Ambarus@microchip.com wrote:
>> Hi, Koen,
>>
>> On Monday, January 6, 2020 2:46:24 PM EET Koen Vandeputte wrote:
>>> Tested on a MikroTik RB912UAG-5HPnD r2
>>>
>>> [    0.641714] m25p80 spi0.0: found gd25d05, expected m25p80
>>> [    0.649916] m25p80 spi0.0: gd25d05 (64 Kbytes)
>>> [    0.655122] Creating 4 MTD partitions on "spi0.0":
>>> [    0.660164] 0x000000000000-0x00000000c000 : "routerboot"
>>> [    0.667782] 0x00000000c000-0x00000000d000 : "hard_config"
>>> [    0.675073] 0x00000000d000-0x00000000e000 : "bios"
>>> [    0.682613] 0x00000000e000-0x00000000f000 : "soft_config"
>> I'm afraid that this is not enough. You'll have to test all the flags 
>> that you
>> advertised. Typically one should do a read, erase, write, read-back 
>> test, and
>> then to exercise the lock and unlock features. If you want to be 
>> exhaustive,
>> you can force the controller to do the reads in single, dual or quad 
>> modes,
>> but if you choose to test just the best supported read mode, it is 
>> fine too.
>> Please specify in the commit message what you tested.
>>
>> Cheers,
>> ta
> Hi Tudor,
>
> Thanks for the guidance here as it's my first patch towards this part 
> of the kernel.
>
> I've not only went through the datasheet of this device, but also the 
> datasheet from another very similar GD chip carrying the same specs
> All features as indicated by the flags are clearly described in both 
> datasheets. (like, Single, Dual, Quad modes)
>
> The only delta is the amount of advertised blocks, and some other chip 
> package details out-of-scope from electrical performance.
>
> Is this clarification enough to send a V2 with a modified commit msg?
>
> Please advice,
> Thanks again,
>
> Koen

Friendly ping :-)

Koen


>>> Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
>>> Cc: Miquel Raynal <miquel.raynal@bootlin.com>
>>> Cc: Richard Weinberger <richard@nod.at>
>>> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
>>> Cc: Vignesh Raghavendra <vigneshr@ti.com>
>>> ---
>>>   drivers/mtd/spi-nor/spi-nor.c | 5 +++++
>>>   1 file changed, 5 insertions(+)
>>>
>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c 
>>> b/drivers/mtd/spi-nor/spi-nor.c
>>> index f4afe123e9dc..a34fa42d47a2 100644
>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -2346,6 +2346,11 @@ static const struct flash_info spi_nor_ids[] = {
>>>       { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE)
>> },
>>>       /* GigaDevice */
>>> +    {
>>> +        "gd25d05", INFO(0xc84010, 0, 64 * 1024,  1,
>>> +            SECT_4K | SPI_NOR_DUAL_READ |
>> SPI_NOR_QUAD_READ |
>>> +            SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
>>> +    },
>>>       {
>>>           "gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
>>>               SECT_4K | SPI_NOR_DUAL_READ |
>> SPI_NOR_QUAD_READ |
>>
>>
>>
Vignesh Raghavendra Feb. 5, 2020, 6:02 a.m. UTC | #4
Hi

On 04/02/20 7:40 pm, Koen Vandeputte wrote:
> 
> On 14.01.20 10:13, Koen Vandeputte wrote:
>>
>> On 11.01.20 16:52, Tudor.Ambarus@microchip.com wrote:
>>> Hi, Koen,
>>>
>>> On Monday, January 6, 2020 2:46:24 PM EET Koen Vandeputte wrote:
>>>> Tested on a MikroTik RB912UAG-5HPnD r2
>>>>
>>>> [    0.641714] m25p80 spi0.0: found gd25d05, expected m25p80
>>>> [    0.649916] m25p80 spi0.0: gd25d05 (64 Kbytes)
>>>> [    0.655122] Creating 4 MTD partitions on "spi0.0":
>>>> [    0.660164] 0x000000000000-0x00000000c000 : "routerboot"
>>>> [    0.667782] 0x00000000c000-0x00000000d000 : "hard_config"
>>>> [    0.675073] 0x00000000d000-0x00000000e000 : "bios"
>>>> [    0.682613] 0x00000000e000-0x00000000f000 : "soft_config"
>>> I'm afraid that this is not enough. You'll have to test all the flags
>>> that you
>>> advertised. Typically one should do a read, erase, write, read-back
>>> test, and
>>> then to exercise the lock and unlock features. If you want to be
>>> exhaustive,
>>> you can force the controller to do the reads in single, dual or quad
>>> modes,
>>> but if you choose to test just the best supported read mode, it is
>>> fine too.
>>> Please specify in the commit message what you tested.
>>>
>>> Cheers,
>>> ta
>> Hi Tudor,
>>
>> Thanks for the guidance here as it's my first patch towards this part
>> of the kernel.
>>
>> I've not only went through the datasheet of this device, but also the
>> datasheet from another very similar GD chip carrying the same specs
>> All features as indicated by the flags are clearly described in both
>> datasheets. (like, Single, Dual, Quad modes)
>>
>> The only delta is the amount of advertised blocks, and some other chip
>> package details out-of-scope from electrical performance.
>>
>> Is this clarification enough to send a V2 with a modified commit msg?
>>

Please add what modes were tested as part of commit message and respin.

BTW, there is GD25D05B and GD25D05C. Which is the flash this that you
have tested with (please add that info to commit message)?

Regards
Vignesh
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index f4afe123e9dc..a34fa42d47a2 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -2346,6 +2346,11 @@  static const struct flash_info spi_nor_ids[] = {
 	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
 
 	/* GigaDevice */
+	{
+		"gd25d05", INFO(0xc84010, 0, 64 * 1024,  1,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{
 		"gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |