Message ID | 20191029111615.3706-19-tudor.ambarus@microchip.com |
---|---|
State | Accepted |
Delegated to: | Ambarus Tudor |
Headers | show |
Series | mtd: spi-nor: Quad Enable and (un)lock methods | expand |
On Tue, 29 Oct 2019 11:17:17 +0000 <Tudor.Ambarus@microchip.com> wrote: > From: Tudor Ambarus <tudor.ambarus@microchip.com> > > Constify the data to write to the Status Register. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> > --- > drivers/mtd/spi-nor/spi-nor.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 5fb4d953b5c7..274786e1988f 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -865,7 +865,7 @@ static int spi_nor_write_sr(struct spi_nor *nor, u8 val) > * second byte will be written to the configuration register. > * Return negative if error occurred. > */ > -static int spi_nor_write_sr_cr(struct spi_nor *nor, u8 *sr_cr) > +static int spi_nor_write_sr_cr(struct spi_nor *nor, const u8 *sr_cr) > { > int ret; > > @@ -912,7 +912,7 @@ static int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 status_new, > return ((nor->bouncebuf[0] & mask) != (status_new & mask)) ? -EIO : 0; > } > > -static int spi_nor_write_sr2(struct spi_nor *nor, u8 *sr2) > +static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) > { > int ret; >
On 10/29/2019 01:17 PM, Tudor Ambarus - M18064 wrote: > From: Tudor Ambarus <tudor.ambarus@microchip.com> > > Constify the data to write to the Status Register. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mtd/spi-nor/spi-nor.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Applied to spi-nor/next. Thanks.
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 5fb4d953b5c7..274786e1988f 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -865,7 +865,7 @@ static int spi_nor_write_sr(struct spi_nor *nor, u8 val) * second byte will be written to the configuration register. * Return negative if error occurred. */ -static int spi_nor_write_sr_cr(struct spi_nor *nor, u8 *sr_cr) +static int spi_nor_write_sr_cr(struct spi_nor *nor, const u8 *sr_cr) { int ret; @@ -912,7 +912,7 @@ static int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 status_new, return ((nor->bouncebuf[0] & mask) != (status_new & mask)) ? -EIO : 0; } -static int spi_nor_write_sr2(struct spi_nor *nor, u8 *sr2) +static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) { int ret;