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[203.54.172.54]) by smtp.gmail.com with ESMTPSA id k15sm6734598pgt.66.2019.09.18.18.49.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 18 Sep 2019 18:49:25 -0700 (PDT) From: Shreyas Joshi X-Google-Original-From: Shreyas Joshi To: marek.vasut@gmail.com, tudor.ambarus@microchip.com, linux-mtd@lists.infradead.org, shreyasjoshi15@gmail.com Subject: [PATCH] driver/mtd/spi-nor: Regression lock/unlock fail Date: Thu, 19 Sep 2019 11:49:16 +1000 Message-Id: <20190919014916.1303-1-shreyas.joshi@biamp.com> X-Mailer: git-send-email 2.23.0.windows.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190918_184927_634148_C6FE9168 X-CRM114-Status: GOOD ( 11.18 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:444 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (shreyasjoshi15[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (shreyasjoshi15[at]gmail.com) -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: shreyas The n25q128 micron chips cannot be treated similar to STM SPI NOR when it comes to flash lock/unlock. The JDEC ID read here is just 1 byte and it is not sufficient to distinguish between different chips. Thus, memory type is used here in addition to JDEC ID to distinguish further. Once the unique manufacture id is detected, it will invoke the required lock/unlock function required for n25 micron chipsets. Signed-off-by: shreyas --- drivers/mtd/spi-nor/spi-nor.c | 20 +++++++++++--------- include/linux/mtd/spi-nor.h | 4 ++-- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index f3b2df2c52b4..6dfdd95a5961 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1356,6 +1356,7 @@ static int n25q_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) int status_old, status_new; uint32_t offset = ofs; int ret = 0; + status_old = read_sr(nor); if (status_old < 0) return status_old; @@ -1373,7 +1374,8 @@ static int n25q_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) status_new = (status_old & ~(SR_BP2|SR_BP0)) | SR_BP1; else status_new = (status_old & ~(SR_BP2|SR_BP1)) | SR_BP0; - if ((status_new & (SR_BP2|SR_BP1|SR_BP0)) > (status_old & (SR_BP2|SR_BP1|SR_BP0))) { + if ((status_new & (SR_BP2|SR_BP1|SR_BP0)) > + (status_old & (SR_BP2|SR_BP1|SR_BP0))) { write_enable(nor); if (write_sr(nor, status_new) < 0) return -EINVAL; @@ -1392,6 +1394,7 @@ static int n25q_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) int status_old, status_new; uint32_t offset = ofs; int ret = 0; + status_old = read_sr(nor); if (status_old < 0) return status_old; @@ -4266,14 +4269,13 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, if (JEDEC_MFR(info) == SNOR_MFR_ST || JEDEC_MFR(info) == SNOR_MFR_MICRON || info->flags & SPI_NOR_HAS_LOCK) { - if (JEDEC_MT(info) == SNOR_MT_MICRON) { - nor->flash_lock = n25q_lock; - nor->flash_unlock = n25q_unlock; - } - else { - nor->flash_lock = stm_lock; - nor->flash_unlock = stm_unlock; - } + if (JEDEC_MT(info) == SNOR_MT_MICRON) { + nor->flash_lock = n25q_lock; + nor->flash_unlock = n25q_unlock; + } else { + nor->flash_lock = stm_lock; + nor->flash_unlock = stm_unlock; + } nor->flash_is_locked = stm_is_locked; } if (nor->flash_lock && nor->flash_unlock && nor->flash_is_locked) { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index aaa3c1065b3b..3939cd77d778 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -27,8 +27,8 @@ #define SNOR_MFR_WINBOND 0xef /* Also used by some Spansion */ /* Manufacturer Memory Type -* The second byte returned from the flash after sending opcode SPINOR_OP_RDID. -*/ + * The second byte returned from the flash after sending opcode SPINOR_OP_RDID. + */ #define SNOR_MT_MICRON 0xba #define SNOR_MT_ST 0x20