| Message ID | 20190826120821.16351-3-tudor.ambarus@microchip.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | mtd: spi-nor: move manuf out of the core | expand |
On 26/08/19 5:38 PM, Tudor.Ambarus@microchip.com wrote: > From: Tudor Ambarus <tudor.ambarus@microchip.com> > > The Flash parameters and settings are now stored in 'struct spi_nor'. > Use this instead of the stack allocated params. > > Few functions stop passing pointer to params, as they can get it from > 'struct spi_nor'. spi_nor_parse_sfdp() and children will keep passing > pointer to params because of the roll-back mechanism: in case the > parsing of SFDP fails, the legacy flash parameter and settings will be > restored. > > Zeroing params is no longer needed because all SPI NOR users kzalloc > 'struct spi_nor'. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> > --- Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Regards Vignesh > v3: collect R-b > > drivers/mtd/spi-nor/spi-nor.c | 46 ++++++++++++++++++------------------------- > 1 file changed, 19 insertions(+), 27 deletions(-) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index d35dc6a97521..e9b9cd70a999 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -2974,16 +2974,13 @@ static int spi_nor_spimem_check_pp(struct spi_nor *nor, > * spi_nor_spimem_adjust_hwcaps - Find optimal Read/Write protocol > * based on SPI controller capabilities > * @nor: pointer to a 'struct spi_nor' > - * @params: pointer to the 'struct spi_nor_flash_parameter' > - * representing SPI NOR flash capabilities > * @hwcaps: pointer to resulting capabilities after adjusting > * according to controller and flash's capability > */ > static void > -spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, > - const struct spi_nor_flash_parameter *params, > - u32 *hwcaps) > +spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps) > { > + struct spi_nor_flash_parameter *params = &nor->params; > unsigned int cap; > > /* DTR modes are not supported yet, mask them all. */ > @@ -4129,16 +4126,13 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, > return err; > } > > -static int spi_nor_init_params(struct spi_nor *nor, > - struct spi_nor_flash_parameter *params) > +static int spi_nor_init_params(struct spi_nor *nor) > { > + struct spi_nor_flash_parameter *params = &nor->params; > struct spi_nor_erase_map *map = &nor->erase_map; > const struct flash_info *info = nor->info; > u8 i, erase_mask; > > - /* Set legacy flash parameters as default. */ > - memset(params, 0, sizeof(*params)); > - > /* Set SPI NOR sizes. */ > params->size = (u64)info->sector_size * info->n_sectors; > params->page_size = info->page_size; > @@ -4255,7 +4249,6 @@ static int spi_nor_init_params(struct spi_nor *nor, > } > > static int spi_nor_select_read(struct spi_nor *nor, > - const struct spi_nor_flash_parameter *params, > u32 shared_hwcaps) > { > int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_READ_MASK) - 1; > @@ -4268,7 +4261,7 @@ static int spi_nor_select_read(struct spi_nor *nor, > if (cmd < 0) > return -EINVAL; > > - read = ¶ms->reads[cmd]; > + read = &nor->params.reads[cmd]; > nor->read_opcode = read->opcode; > nor->read_proto = read->proto; > > @@ -4287,7 +4280,6 @@ static int spi_nor_select_read(struct spi_nor *nor, > } > > static int spi_nor_select_pp(struct spi_nor *nor, > - const struct spi_nor_flash_parameter *params, > u32 shared_hwcaps) > { > int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_PP_MASK) - 1; > @@ -4300,7 +4292,7 @@ static int spi_nor_select_pp(struct spi_nor *nor, > if (cmd < 0) > return -EINVAL; > > - pp = ¶ms->page_programs[cmd]; > + pp = &nor->params.page_programs[cmd]; > nor->program_opcode = pp->opcode; > nor->write_proto = pp->proto; > return 0; > @@ -4407,9 +4399,9 @@ static int spi_nor_select_erase(struct spi_nor *nor, u32 wanted_size) > } > > static int spi_nor_setup(struct spi_nor *nor, > - const struct spi_nor_flash_parameter *params, > const struct spi_nor_hwcaps *hwcaps) > { > + struct spi_nor_flash_parameter *params = &nor->params; > u32 ignored_mask, shared_mask; > bool enable_quad_io; > int err; > @@ -4426,7 +4418,7 @@ static int spi_nor_setup(struct spi_nor *nor, > * need to discard some of them based on what the SPI > * controller actually supports (using spi_mem_supports_op()). > */ > - spi_nor_spimem_adjust_hwcaps(nor, params, &shared_mask); > + spi_nor_spimem_adjust_hwcaps(nor, &shared_mask); > } else { > /* > * SPI n-n-n protocols are not supported when the SPI > @@ -4442,7 +4434,7 @@ static int spi_nor_setup(struct spi_nor *nor, > } > > /* Select the (Fast) Read command. */ > - err = spi_nor_select_read(nor, params, shared_mask); > + err = spi_nor_select_read(nor, shared_mask); > if (err) { > dev_err(nor->dev, > "can't select read settings supported by both the SPI controller and memory.\n"); > @@ -4450,7 +4442,7 @@ static int spi_nor_setup(struct spi_nor *nor, > } > > /* Select the Page Program command. */ > - err = spi_nor_select_pp(nor, params, shared_mask); > + err = spi_nor_select_pp(nor, shared_mask); > if (err) { > dev_err(nor->dev, > "can't select write settings supported by both the SPI controller and memory.\n"); > @@ -4553,11 +4545,11 @@ static const struct flash_info *spi_nor_match_id(const char *name) > int spi_nor_scan(struct spi_nor *nor, const char *name, > const struct spi_nor_hwcaps *hwcaps) > { > - struct spi_nor_flash_parameter params; > const struct flash_info *info = NULL; > struct device *dev = nor->dev; > struct mtd_info *mtd = &nor->mtd; > struct device_node *np = spi_nor_get_flash_node(nor); > + struct spi_nor_flash_parameter *params = &nor->params; > int ret; > int i; > > @@ -4639,7 +4631,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > nor->clear_sr_bp = spi_nor_clear_sr_bp; > > /* Parse the Serial Flash Discoverable Parameters table. */ > - ret = spi_nor_init_params(nor, ¶ms); > + ret = spi_nor_init_params(nor); > if (ret) > return ret; > > @@ -4649,7 +4641,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > mtd->type = MTD_NORFLASH; > mtd->writesize = 1; > mtd->flags = MTD_CAP_NORFLASH; > - mtd->size = params.size; > + mtd->size = params->size; > mtd->_erase = spi_nor_erase; > mtd->_read = spi_nor_read; > mtd->_resume = spi_nor_resume; > @@ -4688,18 +4680,18 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > mtd->flags |= MTD_NO_ERASE; > > mtd->dev.parent = dev; > - nor->page_size = params.page_size; > + nor->page_size = params->page_size; > mtd->writebufsize = nor->page_size; > > if (np) { > /* If we were instantiated by DT, use it */ > if (of_property_read_bool(np, "m25p,fast-read")) > - params.hwcaps.mask |= SNOR_HWCAPS_READ_FAST; > + params->hwcaps.mask |= SNOR_HWCAPS_READ_FAST; > else > - params.hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; > + params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; > } else { > /* If we weren't instantiated by DT, default to fast-read */ > - params.hwcaps.mask |= SNOR_HWCAPS_READ_FAST; > + params->hwcaps.mask |= SNOR_HWCAPS_READ_FAST; > } > > if (of_property_read_bool(np, "broken-flash-reset")) > @@ -4707,7 +4699,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > > /* Some devices cannot do fast-read, no matter what DT tells us */ > if (info->flags & SPI_NOR_NO_FR) > - params.hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; > + params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; > > /* > * Configure the SPI memory: > @@ -4716,7 +4708,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > * - set the SPI protocols for register and memory accesses. > * - set the Quad Enable bit if needed (required by SPI x-y-4 protos). > */ > - ret = spi_nor_setup(nor, ¶ms, hwcaps); > + ret = spi_nor_setup(nor, hwcaps); > if (ret) > return ret; > >
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index d35dc6a97521..e9b9cd70a999 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -2974,16 +2974,13 @@ static int spi_nor_spimem_check_pp(struct spi_nor *nor, * spi_nor_spimem_adjust_hwcaps - Find optimal Read/Write protocol * based on SPI controller capabilities * @nor: pointer to a 'struct spi_nor' - * @params: pointer to the 'struct spi_nor_flash_parameter' - * representing SPI NOR flash capabilities * @hwcaps: pointer to resulting capabilities after adjusting * according to controller and flash's capability */ static void -spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, - u32 *hwcaps) +spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps) { + struct spi_nor_flash_parameter *params = &nor->params; unsigned int cap; /* DTR modes are not supported yet, mask them all. */ @@ -4129,16 +4126,13 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, return err; } -static int spi_nor_init_params(struct spi_nor *nor, - struct spi_nor_flash_parameter *params) +static int spi_nor_init_params(struct spi_nor *nor) { + struct spi_nor_flash_parameter *params = &nor->params; struct spi_nor_erase_map *map = &nor->erase_map; const struct flash_info *info = nor->info; u8 i, erase_mask; - /* Set legacy flash parameters as default. */ - memset(params, 0, sizeof(*params)); - /* Set SPI NOR sizes. */ params->size = (u64)info->sector_size * info->n_sectors; params->page_size = info->page_size; @@ -4255,7 +4249,6 @@ static int spi_nor_init_params(struct spi_nor *nor, } static int spi_nor_select_read(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, u32 shared_hwcaps) { int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_READ_MASK) - 1; @@ -4268,7 +4261,7 @@ static int spi_nor_select_read(struct spi_nor *nor, if (cmd < 0) return -EINVAL; - read = ¶ms->reads[cmd]; + read = &nor->params.reads[cmd]; nor->read_opcode = read->opcode; nor->read_proto = read->proto; @@ -4287,7 +4280,6 @@ static int spi_nor_select_read(struct spi_nor *nor, } static int spi_nor_select_pp(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, u32 shared_hwcaps) { int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_PP_MASK) - 1; @@ -4300,7 +4292,7 @@ static int spi_nor_select_pp(struct spi_nor *nor, if (cmd < 0) return -EINVAL; - pp = ¶ms->page_programs[cmd]; + pp = &nor->params.page_programs[cmd]; nor->program_opcode = pp->opcode; nor->write_proto = pp->proto; return 0; @@ -4407,9 +4399,9 @@ static int spi_nor_select_erase(struct spi_nor *nor, u32 wanted_size) } static int spi_nor_setup(struct spi_nor *nor, - const struct spi_nor_flash_parameter *params, const struct spi_nor_hwcaps *hwcaps) { + struct spi_nor_flash_parameter *params = &nor->params; u32 ignored_mask, shared_mask; bool enable_quad_io; int err; @@ -4426,7 +4418,7 @@ static int spi_nor_setup(struct spi_nor *nor, * need to discard some of them based on what the SPI * controller actually supports (using spi_mem_supports_op()). */ - spi_nor_spimem_adjust_hwcaps(nor, params, &shared_mask); + spi_nor_spimem_adjust_hwcaps(nor, &shared_mask); } else { /* * SPI n-n-n protocols are not supported when the SPI @@ -4442,7 +4434,7 @@ static int spi_nor_setup(struct spi_nor *nor, } /* Select the (Fast) Read command. */ - err = spi_nor_select_read(nor, params, shared_mask); + err = spi_nor_select_read(nor, shared_mask); if (err) { dev_err(nor->dev, "can't select read settings supported by both the SPI controller and memory.\n"); @@ -4450,7 +4442,7 @@ static int spi_nor_setup(struct spi_nor *nor, } /* Select the Page Program command. */ - err = spi_nor_select_pp(nor, params, shared_mask); + err = spi_nor_select_pp(nor, shared_mask); if (err) { dev_err(nor->dev, "can't select write settings supported by both the SPI controller and memory.\n"); @@ -4553,11 +4545,11 @@ static const struct flash_info *spi_nor_match_id(const char *name) int spi_nor_scan(struct spi_nor *nor, const char *name, const struct spi_nor_hwcaps *hwcaps) { - struct spi_nor_flash_parameter params; const struct flash_info *info = NULL; struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; struct device_node *np = spi_nor_get_flash_node(nor); + struct spi_nor_flash_parameter *params = &nor->params; int ret; int i; @@ -4639,7 +4631,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, nor->clear_sr_bp = spi_nor_clear_sr_bp; /* Parse the Serial Flash Discoverable Parameters table. */ - ret = spi_nor_init_params(nor, ¶ms); + ret = spi_nor_init_params(nor); if (ret) return ret; @@ -4649,7 +4641,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mtd->type = MTD_NORFLASH; mtd->writesize = 1; mtd->flags = MTD_CAP_NORFLASH; - mtd->size = params.size; + mtd->size = params->size; mtd->_erase = spi_nor_erase; mtd->_read = spi_nor_read; mtd->_resume = spi_nor_resume; @@ -4688,18 +4680,18 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mtd->flags |= MTD_NO_ERASE; mtd->dev.parent = dev; - nor->page_size = params.page_size; + nor->page_size = params->page_size; mtd->writebufsize = nor->page_size; if (np) { /* If we were instantiated by DT, use it */ if (of_property_read_bool(np, "m25p,fast-read")) - params.hwcaps.mask |= SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask |= SNOR_HWCAPS_READ_FAST; else - params.hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; } else { /* If we weren't instantiated by DT, default to fast-read */ - params.hwcaps.mask |= SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask |= SNOR_HWCAPS_READ_FAST; } if (of_property_read_bool(np, "broken-flash-reset")) @@ -4707,7 +4699,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, /* Some devices cannot do fast-read, no matter what DT tells us */ if (info->flags & SPI_NOR_NO_FR) - params.hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; + params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; /* * Configure the SPI memory: @@ -4716,7 +4708,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, * - set the SPI protocols for register and memory accesses. * - set the Quad Enable bit if needed (required by SPI x-y-4 protos). */ - ret = spi_nor_setup(nor, ¶ms, hwcaps); + ret = spi_nor_setup(nor, hwcaps); if (ret) return ret;