| Message ID | 20190313082120.17913-1-alexander.sverdlin@nokia.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Ambarus Tudor |
| Headers | show |
| Series | [v3] spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write | expand |
On Wed, Mar 13, 2019 at 08:21:46AM +0000, Sverdlin, Alexander (Nokia - DE/Ulm) wrote: > It was observed that reads crossing 4K address boundary are failing. > > This limitation is mentioned in Intel documents: > > Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet: > > "5.26.3 Flash Access > Program Register Access: > * Program Register Accesses are not allowed to cross a 4 KB boundary..." > > Enhanced Serial Peripheral Interface (eSPI) > Interface Base Specification (for Client and Server Platforms): > > "5.1.4 Address > For other memory transactions, the address may start or end at any byte > boundary. However, the address and payload length combination must not > cross the naturally aligned address boundary of the corresponding Maximum > Payload Size. It must not cross a 4 KB address boundary." > > Avoid this by splitting an operation crossing the boundary into two > operations. > > Cc: stable@vger.kernel.org > Reported-by: Romain Porte <romain.porte@nokia.com> > Tested-by: Pascal Fabreges <pascal.fabreges@nokia.com> > Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Hi, Alexander, On 03/13/2019 10:21 AM, Sverdlin, Alexander (Nokia - DE/Ulm) wrote: > It was observed that reads crossing 4K address boundary are failing. > > This limitation is mentioned in Intel documents: > > Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet: > > "5.26.3 Flash Access > Program Register Access: > * Program Register Accesses are not allowed to cross a 4 KB boundary..." > > Enhanced Serial Peripheral Interface (eSPI) > Interface Base Specification (for Client and Server Platforms): > > "5.1.4 Address > For other memory transactions, the address may start or end at any byte > boundary. However, the address and payload length combination must not > cross the naturally aligned address boundary of the corresponding Maximum > Payload Size. It must not cross a 4 KB address boundary." > > Avoid this by splitting an operation crossing the boundary into two > operations. > > Cc: stable@vger.kernel.org > Reported-by: Romain Porte <romain.porte@nokia.com> > Tested-by: Pascal Fabreges <pascal.fabreges@nokia.com> > Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Please fix your author name to match your S-o-b tag. See https://lkml.org/lkml/2019/2/8/556 for a workaround. For consistency, all spi-nor patches should be prepended with "mtd: spi-nor:", you forgot the "mtd:" part. Looks good apart of these, I'll add my R-b tag on the next version. Thanks, ta > --- > Changelog: > v2: More macros! As suggested by Mika. > v3: Actually compiled. Sorry Mika, the lines are really long now. > > drivers/mtd/spi-nor/intel-spi.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c > index af0a220..d60cbf2 100644 > --- a/drivers/mtd/spi-nor/intel-spi.c > +++ b/drivers/mtd/spi-nor/intel-spi.c > @@ -632,6 +632,10 @@ static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len, > while (len > 0) { > block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); > > + /* Read cannot cross 4K boundary */ > + block_size = min_t(loff_t, from + block_size, > + round_up(from + 1, SZ_4K)) - from; > + > writel(from, ispi->base + FADDR); > > val = readl(ispi->base + HSFSTS_CTL); > @@ -685,6 +689,10 @@ static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, > while (len > 0) { > block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); > > + /* Write cannot cross 4K boundary */ > + block_size = min_t(loff_t, to + block_size, > + round_up(to + 1, SZ_4K)) - to; > + > writel(to, ispi->base + FADDR); > > val = readl(ispi->base + HSFSTS_CTL); >
diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c index af0a220..d60cbf2 100644 --- a/drivers/mtd/spi-nor/intel-spi.c +++ b/drivers/mtd/spi-nor/intel-spi.c @@ -632,6 +632,10 @@ static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len, while (len > 0) { block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); + /* Read cannot cross 4K boundary */ + block_size = min_t(loff_t, from + block_size, + round_up(from + 1, SZ_4K)) - from; + writel(from, ispi->base + FADDR); val = readl(ispi->base + HSFSTS_CTL); @@ -685,6 +689,10 @@ static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, while (len > 0) { block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); + /* Write cannot cross 4K boundary */ + block_size = min_t(loff_t, to + block_size, + round_up(to + 1, SZ_4K)) - to; + writel(to, ispi->base + FADDR); val = readl(ispi->base + HSFSTS_CTL);