diff mbox series

[RFC,v2,1/6] mtd: spi-nor: atmel-quaspi: Typo fix

Message ID 20180627131609.13681-2-bugalski.piotr@gmail.com
State Changes Requested
Delegated to: Boris Brezillon
Headers show
Series New QuadSPI driver for Atmel SAMA5D2 | expand

Commit Message

Piotr Bugalski June 27, 2018, 1:16 p.m. UTC 
Just minor typo fix. Fixed in preparation of new driver.

Signed-off: Piotr Bugalski <pbu@cryptera.com>
---
 drivers/mtd/spi-nor/atmel-quadspi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Alexandre Belloni July 3, 2018, 12:52 p.m. UTC | #1 
Hi,

On 27/06/2018 15:16:04+0200, Piotr Bugalski wrote:
> Just minor typo fix. Fixed in preparation of new driver.
> 
> Signed-off: Piotr Bugalski <pbu@cryptera.com>

This SoB line must match the author. It doesn't matter which one you
change. note that you can still submit your patch from an address
different from your work address if necessary (git format-patch will
insert the proper From line).
Piotr Bugalski July 5, 2018, 7:26 a.m. UTC | #2 
Hi Alexandre,

Thank you for you comment.

On Tue, 3 Jul 2018, Alexandre Belloni wrote:

> Hi,
>
> On 27/06/2018 15:16:04+0200, Piotr Bugalski wrote:
>> Just minor typo fix. Fixed in preparation of new driver.
>>
>> Signed-off: Piotr Bugalski <pbu@cryptera.com>
>
> This SoB line must match the author. It doesn't matter which one you
> change. note that you can still submit your patch from an address
> different from your work address if necessary (git format-patch will
> insert the proper From line).
>

I didn't notice this issue, I'll fix it in next release.

> -- 
> Alexandre Belloni, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
>

Best Regards,
Piotr
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/atmel-quadspi.c b/drivers/mtd/spi-nor/atmel-quadspi.c
index 6c5708bacad8..bdbfaa632dbf 100644
--- a/drivers/mtd/spi-nor/atmel-quadspi.c
+++ b/drivers/mtd/spi-nor/atmel-quadspi.c
@@ -67,7 +67,7 @@ 
 #define QSPI_CR_LASTXFER                BIT(24)
 
 /* Bitfields in QSPI_MR (Mode Register) */
-#define QSPI_MR_SSM                     BIT(0)
+#define QSPI_MR_SMM                     BIT(0)
 #define QSPI_MR_LLB                     BIT(1)
 #define QSPI_MR_WDRBT                   BIT(2)
 #define QSPI_MR_SMRM                    BIT(3)
@@ -563,7 +563,7 @@  static int atmel_qspi_init(struct atmel_qspi *aq)
 	qspi_writel(aq, QSPI_CR, QSPI_CR_SWRST);
 
 	/* Set the QSPI controller in Serial Memory Mode */
-	mr = QSPI_MR_NBBITS(8) | QSPI_MR_SSM;
+	mr = QSPI_MR_NBBITS(8) | QSPI_MR_SMM;
 	qspi_writel(aq, QSPI_MR, mr);
 
 	src_rate = clk_get_rate(aq->clk);