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[v2] mtd: nand: samsung: Disable subpage writes on E-die NAND

Message ID 20180109131911.GA3907@lenoch
State Accepted
Delegated to: Boris Brezillon
Headers show
Series [v2] mtd: nand: samsung: Disable subpage writes on E-die NAND | expand

Commit Message

Ladislav Michl Jan. 9, 2018, 1:19 p.m. UTC
Samsung E-die SLC NAND manufactured using 21nm process (K9F1G08U0E)
does not support partial page programming, so disable subpage writes
for it. Manufacturing process is stored in lowest two bits of 5th ID
byte.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
---
 Changes:
 - v2: 
   * Reword commit log
   * Check also for device type
   * Reimplement if statements using switch

 drivers/mtd/nand/nand_samsung.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

Comments

Boris Brezillon Jan. 10, 2018, 8:46 a.m. UTC | #1
On Tue, 9 Jan 2018 14:19:11 +0100
Ladislav Michl <ladis@linux-mips.org> wrote:

> Samsung E-die SLC NAND manufactured using 21nm process (K9F1G08U0E)
> does not support partial page programming, so disable subpage writes
> for it. Manufacturing process is stored in lowest two bits of 5th ID
> byte.

Applied.

Thanks,

Boris

> 
> Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
> ---
>  Changes:
>  - v2: 
>    * Reword commit log
>    * Check also for device type
>    * Reimplement if statements using switch
> 
>  drivers/mtd/nand/nand_samsung.c | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c
> index f6b0a63a068c..6971c35b78e9 100644
> --- a/drivers/mtd/nand/nand_samsung.c
> +++ b/drivers/mtd/nand/nand_samsung.c
> @@ -92,10 +92,22 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
>  	} else {
>  		nand_decode_ext_id(chip);
>  
> -		/* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */
> -		if (nand_is_slc(chip) && chip->id.data[1] == 0xDC) {
> -			chip->ecc_step_ds = 512;
> -			chip->ecc_strength_ds = 1;
> +		if (nand_is_slc(chip)) {
> +			switch (chip->id.data[1]) {
> +			/* K9F4G08U0D-S[I|C]B0(T00) */
> +			case 0xDC:
> +				chip->ecc_step_ds = 512;
> +				chip->ecc_strength_ds = 1;
> +				break;
> +			/* K9F1G08U0E 21nm chips do not support subpage write */
> +			case 0xF1:
> +				if (chip->id.len > 4 &&
> +				    (chip->id.data[4] & GENMASK(1,0)) == 0x1)
> +					chip->options |= NAND_NO_SUBPAGE_WRITE;
> +				break;
> +			default:
> +				break;
> +			}
>  		}
>  	}
>  }
diff mbox series

Patch

diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c
index f6b0a63a068c..6971c35b78e9 100644
--- a/drivers/mtd/nand/nand_samsung.c
+++ b/drivers/mtd/nand/nand_samsung.c
@@ -92,10 +92,22 @@  static void samsung_nand_decode_id(struct nand_chip *chip)
 	} else {
 		nand_decode_ext_id(chip);
 
-		/* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */
-		if (nand_is_slc(chip) && chip->id.data[1] == 0xDC) {
-			chip->ecc_step_ds = 512;
-			chip->ecc_strength_ds = 1;
+		if (nand_is_slc(chip)) {
+			switch (chip->id.data[1]) {
+			/* K9F4G08U0D-S[I|C]B0(T00) */
+			case 0xDC:
+				chip->ecc_step_ds = 512;
+				chip->ecc_strength_ds = 1;
+				break;
+			/* K9F1G08U0E 21nm chips do not support subpage write */
+			case 0xF1:
+				if (chip->id.len > 4 &&
+				    (chip->id.data[4] & GENMASK(1,0)) == 0x1)
+					chip->options |= NAND_NO_SUBPAGE_WRITE;
+				break;
+			default:
+				break;
+			}
 		}
 	}
 }