From patchwork Sun May 21 13:09:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hauke Mehrtens X-Patchwork-Id: 765086 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wW2L66Ql6z9s7f for ; Sun, 21 May 2017 23:13:50 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="KNcQEF2v"; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=9aRbYFbjWPDk6xWw8vawPW08M0LDkmJXzJCn/NYMbhA=; b=KNcQEF2vQgYm70s+TobTkyKzDm H6r+QzmwHWwm5ffOE7pCPqdd2SIMOW9kT3d7NEFbmyEgRVYRZYG0LipSLNnXawrkta2E+ef6QQ34P l0FQEuNCSIp4PPL2EOjN62gx8Cz7j0siHwDAyRUD+HbT+mgl5ENye/2bgMoV+vkHxsMZxbReeD/Xp pxstR+jOszW/Wk1sxVLOeQmSvjFL2Ygy9C6l1ScaWYb77b8UgeYgj89P2AIMOrsq98fzchP+2kvHA fKv0IB6eWobXuwQ/xnMBoAXK1KQBrAmAoNv9lzLWQQfm0o81uk7Yi7nLvjCyS6GnNEjXdVBEZ798l scmh/R2w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dCQg8-00031q-LE; Sun, 21 May 2017 13:13:48 +0000 Received: from hauke-m.de ([2001:41d0:8:b27b::1] helo=mail.hauke-m.de) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dCQcz-0007Qq-Pg for linux-mtd@lists.infradead.org; Sun, 21 May 2017 13:10:50 +0000 Received: from hauke-desktop.lan (p2003008628380100610A1109F04F7762.dip0.t-ipconnect.de [IPv6:2003:86:2838:100:610a:1109:f04f:7762]) by mail.hauke-m.de (Postfix) with ESMTPSA id 176431001D9; Sun, 21 May 2017 15:09:46 +0200 (CEST) From: Hauke Mehrtens To: ralf@linux-mips.org Subject: [PATCH v2 06/15] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings Date: Sun, 21 May 2017 15:09:09 +0200 Message-Id: <20170521130918.27446-7-hauke@hauke-m.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170521130918.27446-1-hauke@hauke-m.de> References: <20170521130918.27446-1-hauke@hauke-m.de> X-Spam-Status: No, score=0.0 required=7.0 tests=UNPARSEABLE_RELAY, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on hauke-m.de X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170521_061034_829326_BE4CF3EC X-CRM114-Status: GOOD ( 12.71 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, martin.blumenstingl@googlemail.com, Hauke Mehrtens , linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, john@phrozen.org, hauke.mehrtens@intel.com, robh@kernel.org MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Martin Blumenstingl This adds the initial documentation for the RCU module (a MFD device which provides USB PHYs, reset controllers and more). The RCU register range is used for multiple purposes. Mostly one device uses one or multiple register exclusively, but for some registers some bits are for one driver and some other bits are for a different driver. With this patch all accesses to the RCU registers will go through syscon. Signed-off-by: Hauke Mehrtens --- .../devicetree/bindings/mips/lantiq/rcu.txt | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt diff --git a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt new file mode 100644 index 000000000000..118d04fca582 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt @@ -0,0 +1,84 @@ +Lantiq XWAY SoC RCU binding +=========================== + +This binding describes the RCU (reset controller unit) multifunction device, +where each sub-device has it's own set of registers. + +The RCU register range is used for multiple purposes. Mostly one device +uses one or multiple register exclusively, but for some registers some +bits are for one driver and some other bits are for a different driver. +With this patch all accesses to the RCU registers will go through +syscon. + + +------------------------------------------------------------------------------- +Required properties: +- compatible : The first and second values must be: "simple-mfd", "syscon" +- reg : The address and length of the system control registers + + +------------------------------------------------------------------------------- +Example of the RCU bindings on a xRX200 SoC: + rcu0: rcu@203000 { + compatible = "lantiq,rcu-xrx200", "simple-mfd", "syscon"; + reg = <0x203000 0x100>; + big-endian; + + gphy0: gphy@0 { + compatible = "lantiq,xrx200a2x-rcu-gphy"; + lantiq,rcu-syscon = <&rcu0 0x20>; + resets = <&reset0 31 30>; + reset-names = "gphy"; + lantiq,gphy-mode = ; + clocks = <&pmu0 XRX200_PMU_GATE_GPHY>; + clock-names = "gphy"; + }; + + gphy1: gphy@1 { + compatible = "lantiq,xrx200a2x-rcu-gphy"; + lantiq,rcu-syscon = <&rcu0 0x68>; + resets = <&reset0 29 28>; + reset-names = "gphy"; + lantiq,gphy-mode = ; + clocks = <&pmu0 XRX200_PMU_GATE_GPHY>; + clock-names = "gphy"; + }; + + reset0: reset@0 { + compatible = "lantiq,rcu-reset"; + lantiq,rcu-syscon = <&rcu0 0x10 0x14>; + #reset-cells = <2>; + }; + + reset1: reset@1 { + compatible = "lantiq,rcu-reset"; + lantiq,rcu-syscon = <&rcu0 0x48 0x24>; + #reset-cells = <2>; + }; + + usb_phy0: usb2-phy@0 { + compatible = "lantiq,xrx200-rcu-usb2-phy"; + + lantiq,rcu-syscon = <&rcu0 0x18 0x38>; + resets = <&reset1 4 4>, <&reset0 4 4>; + reset-names = "phy", "ctrl"; + #phy-cells = <0>; + }; + + usb_phy1: usb2-phy@1 { + compatible = "lantiq,xrx200-rcu-usb2-phy"; + + lantiq,rcu-syscon = <&rcu0 0x34 0x3C>; + resets = <&reset1 5 5>, <&reset0 4 4>; + reset-names = "phy", "ctrl"; + #phy-cells = <0>; + }; + + reboot { + compatible = "syscon-reboot"; + regmap = <&rcu0>; + offset = <0x10>; + mask = <0x40000000>; + }; + }; +