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[76.173.170.164]) by mx.google.com with ESMTPSA id rn15sm1128849pab.10.2015.01.23.00.30.28 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 23 Jan 2015 00:30:28 -0800 (PST) Date: Fri, 23 Jan 2015 00:30:26 -0800 From: Brian Norris To: Aaron Sierra Subject: Re: [PATCH 2/2 v3 RESEND] mtd: fsl_upm: Support NAND ECC DTS properties Message-ID: <20150123083026.GE3268@brian-ubuntu> References: <1136776275.110939.1421109367310.JavaMail.zimbra@xes-inc.com> <447095612.147126.1421278909058.JavaMail.zimbra@xes-inc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <447095612.147126.1421278909058.JavaMail.zimbra@xes-inc.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150123_003050_547242_3806A206 X-CRM114-Status: GOOD ( 24.33 ) X-Spam-Score: -0.8 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:400e:c03:0:0:0:22a listed in] [list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (computersforpeace[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain Cc: linux-mtd@lists.infradead.org, David Woodhouse , Ezequiel Garcia , devicetree@vger.kernel.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org On Wed, Jan 14, 2015 at 05:41:49PM -0600, Aaron Sierra wrote: > From: Jordan Friendshuh > > Support the generic nand-ecc-mode, nand-ecc-strength, and > nand-ecc-step-size device-tree properties with the Freescale UPM NAND > driver. > > This patch preserves the default software ECC mode while adding the > ability to use BCH ECC for larger NAND devices. > > Signed-off-by: Jordan Friendshuh > Signed-off-by: Aaron Sierra > --- > v2: > * Now using ECC mode and strength helpers from of_mtd.h > * ECC mode and strength checking is more robust > v3 (resent due to [PATCH 1/2] v2 update): > * Require nand-ecc-step-size for soft_bch. > * Simplify mode/strength/step parameter checking. > > .../devicetree/bindings/mtd/fsl-upm-nand.txt | 32 +++++++++++ > drivers/mtd/nand/Kconfig | 1 + > drivers/mtd/nand/fsl_upm.c | 66 ++++++++++++++++++++-- I was thinking about this a bit more, and it seems like we could really just factor this all into the core nand_base code with something like the following patch. It could possibly use some smarter logic to rule out certain combinations (but some of those are already caught in nand_scan_tail() anyway). What do you think? diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 72755d7ec25d..fc4834946233 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -181,6 +181,7 @@ static int fun_chip_init(struct fsl_upm_nand *fun, flash_np = of_get_next_child(upm_np, NULL); if (!flash_np) return -ENODEV; + fun->chip.dn = flash_np; fun->mtd.name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start, flash_np->name); diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 3f24b587304f..b701c3f23da1 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -48,6 +48,7 @@ #include #include #include +#include /* Define default oob placement schemes for large and small page devices */ static struct nand_ecclayout nand_oob_8 = { @@ -3780,6 +3781,33 @@ ident_done: return type; } +static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, + struct device_node *dn) +{ + int ecc_mode, ecc_strength, ecc_step; + + if (of_get_nand_bus_width(dn) == 16) + chip->options |= NAND_BUSWIDTH_16; + + if (of_get_nand_on_flash_bbt(dn)) + chip->bbt_options |= NAND_BBT_USE_FLASH; + + ecc_mode = of_get_nand_ecc_mode(dn); + ecc_strength = of_get_nand_ecc_strength(dn); + ecc_step = of_get_nand_ecc_step_size(dn); + + if (ecc_mode >= 0) + chip->ecc.mode = ecc_mode; + + if (ecc_strength >= 0) + chip->ecc.strength = ecc_strength; + + if (ecc_step > 0) + chip->ecc.size = ecc_step; + + return 0; +} + /** * nand_scan_ident - [NAND Interface] Scan for the NAND device * @mtd: MTD device structure @@ -3797,6 +3825,13 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, int i, nand_maf_id, nand_dev_id; struct nand_chip *chip = mtd->priv; struct nand_flash_dev *type; + int ret; + + if (chip->dn) { + ret = nand_dt_init(mtd, chip, chip->dn); + if (ret) + return ret; + } /* Set the default functions */ nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16); diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 3d4ea7eb2b68..e0f40e12a2c8 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -26,6 +26,8 @@ struct mtd_info; struct nand_flash_dev; +struct device_node; + /* Scan and identify a NAND device */ extern int nand_scan(struct mtd_info *mtd, int max_chips); /* @@ -542,6 +544,7 @@ struct nand_buffers { * flash device * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the * flash device. + * @dn: [BOARDSPECIFIC] device node describing this instance * @read_byte: [REPLACEABLE] read one byte from the chip * @read_word: [REPLACEABLE] read one word from the chip * @write_byte: [REPLACEABLE] write a single byte to the chip on the @@ -644,6 +647,8 @@ struct nand_chip { void __iomem *IO_ADDR_R; void __iomem *IO_ADDR_W; + struct device_node *dn; + uint8_t (*read_byte)(struct mtd_info *mtd); u16 (*read_word)(struct mtd_info *mtd); void (*write_byte)(struct mtd_info *mtd, uint8_t byte);